universal_drivers/si5351_driver
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merge into: universal_drivers:master
Branches Tags
universal_drivers:master universal_drivers:cm_wip_lightversion universal_drivers:cm_wip
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pull from: universal_drivers:cm_wip_lightversion
Branches Tags
universal_drivers:cm_wip_lightversion universal_drivers:master universal_drivers:cm_wip

3 Commits
master ... cm_wip_lig

Author SHA1 Message Date
Christian L. V. Madsen
d6fb9d8856 works 2025-04-13 19:18:57 +02:00
Christian L. V. Madsen
1102fbd4d5 even more lightwheight 2025-04-13 14:35:12 +02:00
Christian L. V. Madsen
a01bd85b6f first commit of light version of this driver.. 2025-04-11 19:30:45 +02:00
2 changed files with 106 additions and 333 deletions
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369
si5351_driver.c
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@@ -15,6 +15,12 @@ enum{
}; };
static int clear_buffer(si5351_driver *inst){
memset(inst->device_data,0, sizeof(inst->device_data));
}
static int readRegister(si5351_driver *inst,uint8_t data_addr, uint8_t *data, uint32_t len){ static int readRegister(si5351_driver *inst,uint8_t data_addr, uint8_t *data, uint32_t len){
// Write what kind of addr we would like to read from: // Write what kind of addr we would like to read from:
@@ -27,74 +33,48 @@ static int readRegister(si5351_driver *inst,uint8_t data_addr, uint8_t *data, ui
return 0; return 0;
} }
static int writeRegister(si5351_driver *inst,uint8_t data_addr, uint8_t *data, uint32_t len){ static int writeRegister(si5351_driver *inst,uint8_t data_addr, uint32_t len){
uint8_t *data_ptr = malloc(len+1); // Set address
inst->device_data[0] = data_addr;
*data_ptr = data_addr; inst->i2c_transfer_evt(inst->i2c_transfer_inst,&inst->device_data[0],len+1, SI5351_I2C_SET);
clear_buffer(inst);
return 0;
// Copy data }
memcpy(&data_ptr[1],data,len);
// Write data:
inst->i2c_transfer_evt(inst->i2c_transfer_inst,data_ptr,len+1, SI5351_I2C_SET);
free(data_ptr);
/* uint8_t txBuf[512] = {data_addr}; static int writeRegisterbyte(si5351_driver *inst,uint8_t data_addr, uint8_t data){
uint8_t *txBuf_ptr = &txBuf[1]; // Set address
uint8_t buff[2] = {data_addr,data};
// add register addr to data: inst->i2c_transfer_evt(inst->i2c_transfer_inst,&buff[0],2, SI5351_I2C_SET);
memcpy(txBuf_ptr,data,len); clear_buffer(inst);
// Write data:
inst->i2c_transfer_evt(inst->i2c_transfer_inst,txBuf,len+1, SI5351_I2C_SET);
//HAL_Delay(1);*/
return 0; return 0;
} }
int cm_setPllParamRaw(si5351_driver *inst, si5351_PLLs sel_pll, uint32_t MSNx_P1, uint32_t MSNx_P2, uint32_t MSNx_P3){ int cm_setPllParamRaw(si5351_driver *inst, si5351_PLLs sel_pll, uint32_t MSNx_P1, uint32_t MSNx_P2, uint32_t MSNx_P3){
si5351_multiSynthNxParameters_t *multiSynthNxParam = (void*)&inst->device_data[1];
multiSynthNxParam->MSNx_P1_17_16 = (MSNx_P1 >> 16) & 0x3;
multiSynthNxParam->MSNx_P1_15_8 = (MSNx_P1 >> 8) & 0xff;
multiSynthNxParam->MSNx_P1_7_0 = MSNx_P1 & 0xff;
multiSynthNxParam->MSNx_P2_19_16 = (MSNx_P2 >> 16) & 0xf;
multiSynthNxParam->MSNx_P2_15_8 = (MSNx_P2 >> 8) & 0xff;
multiSynthNxParam->MSNx_P2_7_0 = MSNx_P2 & 0xff;
multiSynthNxParam->MSNx_P3_19_16 = (MSNx_P3 >> 16) & 0xf;
multiSynthNxParam->MSNx_P3_15_8 = (MSNx_P3 >> 8) & 0xff;
multiSynthNxParam->MSNx_P3_7_0 = MSNx_P3 & 0xff;
switch(sel_pll){ switch(sel_pll){
case SI5351_PLL_A: case SI5351_PLL_A:
writeRegister(inst,SI5351_REG_MULTISYNTH_NA_0, sizeof(si5351_multiSynthNxParameters_t));
inst->device_data.multiSynthNAParam.MSNx_P1_17_16 = (MSNx_P1 >> 16) & 0x2;
inst->device_data.multiSynthNAParam.MSNx_P1_15_8 = (MSNx_P1 >> 8) & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P1_7_0 = MSNx_P1 & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P2_19_16 = ((MSNx_P2 & 0x000F0000) >> 16);
inst->device_data.multiSynthNAParam.MSNx_P2_15_8 = (MSNx_P2 >> 8) & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P2_7_0 = MSNx_P2 & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P3_19_16 = ((MSNx_P3 & 0x000F0000) >> 12);
inst->device_data.multiSynthNAParam.MSNx_P3_15_8 = (MSNx_P3 >> 8) & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P3_7_0 = MSNx_P3 & 0xff;
writeRegister(inst,SI5351_REG_MULTISYNTH_NA_0, (uint8_t*) &inst->device_data.multiSynthNAParam, sizeof(si5351_multiSynthNxParameters_t));
break; break;
case SI5351_PLL_B: case SI5351_PLL_B:
writeRegister(inst,SI5351_REG_MULTISYNTH_NB_0, sizeof(si5351_multiSynthNxParameters_t));
inst->device_data.multiSynthNBParam.MSNx_P1_17_16 = (MSNx_P1 >> 16) & 0x2;
inst->device_data.multiSynthNBParam.MSNx_P1_15_8 = (MSNx_P1 >> 8) & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P1_7_0 = MSNx_P1 & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P2_19_16 = ((MSNx_P2 & 0x000F0000) >> 16);
inst->device_data.multiSynthNBParam.MSNx_P2_15_8 = (MSNx_P2 >> 8) & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P2_7_0 = MSNx_P2 & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P3_19_16 = ((MSNx_P3 & 0x000F0000) >> 12);
inst->device_data.multiSynthNBParam.MSNx_P3_15_8 = (MSNx_P3 >> 8) & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P3_7_0 = MSNx_P3 & 0xff;
writeRegister(inst,SI5351_REG_MULTISYNTH_NB_0, (uint8_t*) &inst->device_data.multiSynthNBParam, sizeof(si5351_multiSynthNxParameters_t));
break; break;
default: default:
@@ -110,63 +90,37 @@ int cm_setPllParamRaw(si5351_driver *inst, si5351_PLLs sel_pll, uint32_t MSNx_P1
int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uint32_t MSx_P1, uint32_t MSx_P2, uint32_t MSx_P3){ int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uint32_t MSx_P1, uint32_t MSx_P2, uint32_t MSx_P3){
si5351_multiSynthxParameters_t *multiSynthxParam = (void*)&inst->device_data[1];
multiSynthxParam->MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division..
multiSynthxParam->MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff;
multiSynthxParam->MSx_P1_7_0 = MSx_P1 & 0xff;
multiSynthxParam->MSx_P2_19_16 = (MSx_P2 >> 16) & 0xf;
multiSynthxParam->MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff;
multiSynthxParam->MSx_P2_7_0 = MSx_P2 & 0xff;
multiSynthxParam->MSx_P3_19_16 = (MSx_P3 >> 16) & 0xf;
multiSynthxParam->MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff;
multiSynthxParam->MSx_P3_7_0 = MSx_P3 & 0xff;
multiSynthxParam->MSx_DIVBY4 = 0;
multiSynthxParam->Rx_DIV = 0;
switch(clk_output){ switch(clk_output){
case SI5351_OUTPUT_0: case SI5351_OUTPUT_0:
inst->device_data.multiSynth0Param.MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division.. writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_0, sizeof(si5351_multiSynthxParameters_t));
inst->device_data.multiSynth0Param.MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff;
inst->device_data.multiSynth0Param.MSx_P1_7_0 = MSx_P1 & 0xff;
inst->device_data.multiSynth0Param.MSx_P2_19_16 = (MSx_P2 >> 16) & 0x3;
inst->device_data.multiSynth0Param.MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff;
inst->device_data.multiSynth0Param.MSx_P2_7_0 = MSx_P2 & 0xff;
inst->device_data.multiSynth0Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3;
inst->device_data.multiSynth0Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff;
inst->device_data.multiSynth0Param.MSx_P3_7_0 = MSx_P3 & 0xff;
inst->device_data.multiSynth0Param.MSx_DIVBY4 = 0;
inst->device_data.multiSynth0Param.Rx_DIV = 0;
writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_0, (uint8_t*) &inst->device_data.multiSynth0Param, sizeof(si5351_multiSynthxParameters_t));
break; break;
case SI5351_OUTPUT_1: case SI5351_OUTPUT_1:
inst->device_data.multiSynth1Param.MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division.. writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_1, sizeof(si5351_multiSynthxParameters_t));
inst->device_data.multiSynth1Param.MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff;
inst->device_data.multiSynth1Param.MSx_P1_7_0 = MSx_P1 & 0xff;
inst->device_data.multiSynth1Param.MSx_P2_19_16 = (MSx_P2 >> 16) & 0x3;
inst->device_data.multiSynth1Param.MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff;
inst->device_data.multiSynth1Param.MSx_P2_7_0 = MSx_P2 & 0xff;
inst->device_data.multiSynth1Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3;
inst->device_data.multiSynth1Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff;
inst->device_data.multiSynth1Param.MSx_P3_7_0 = MSx_P3 & 0xff;
inst->device_data.multiSynth1Param.MSx_DIVBY4 = 0;
inst->device_data.multiSynth1Param.Rx_DIV = 0;
writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_1, (uint8_t*) &inst->device_data.multiSynth1Param, sizeof(si5351_multiSynthxParameters_t));
break; break;
case SI5351_OUTPUT_2: case SI5351_OUTPUT_2:
inst->device_data.multiSynth2Param.MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division.. writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_2, sizeof(si5351_multiSynthxParameters_t));
inst->device_data.multiSynth2Param.MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff; break;
inst->device_data.multiSynth2Param.MSx_P1_7_0 = MSx_P1 & 0xff;
inst->device_data.multiSynth2Param.MSx_P2_19_16 = (MSx_P2 >> 16) & 0x3;
inst->device_data.multiSynth2Param.MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff;
inst->device_data.multiSynth2Param.MSx_P2_7_0 = MSx_P2 & 0xff;
inst->device_data.multiSynth2Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3;
inst->device_data.multiSynth2Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff;
inst->device_data.multiSynth2Param.MSx_P3_7_0 = MSx_P3 & 0xff;
inst->device_data.multiSynth2Param.MSx_DIVBY4 = 0;
inst->device_data.multiSynth2Param.Rx_DIV = 0;
writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_2, (uint8_t*) &inst->device_data.multiSynth2Param, sizeof(si5351_multiSynthxParameters_t));
default: default:
break; break;
@@ -177,135 +131,22 @@ int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uin
} }
int cm_setPLLParameters(si5351_driver *inst,si5351_PLLs sel_pll, uint32_t a, uint32_t b, uint32_t c){
uint32_t temp_val = 0;
switch(sel_pll){
case SI5351_PLL_A:
temp_val = (float)128 * (float)a + ((float)128 * ((float)b/(float)c)) - (float)512;
inst->device_data.multiSynthNAParam.MSNx_P1_17_16 = (temp_val >> 16) & 0x2;
inst->device_data.multiSynthNAParam.MSNx_P1_15_8 = (temp_val >> 8) & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P1_7_0 = temp_val & 0xff;
temp_val = 0;
temp_val = (uint32_t)(128 * b - c * floor(128 * ((float)b / (float)c)));
inst->device_data.multiSynthNAParam.MSNx_P2_19_16 = ((temp_val & 0x000F0000) >> 16);
inst->device_data.multiSynthNAParam.MSNx_P2_15_8 = (temp_val >> 8) & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P2_7_0 = temp_val & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P3_19_16 = ((c & 0x000F0000) >> 12);
inst->device_data.multiSynthNAParam.MSNx_P3_15_8 = (c >> 8) & 0xff;
inst->device_data.multiSynthNAParam.MSNx_P3_7_0 = c & 0xff;
writeRegister(inst,SI5351_REG_MULTISYNTH_NA_0, (uint8_t*) &inst->device_data.multiSynthNAParam, sizeof(si5351_multiSynthNxParameters_t));
break;
case SI5351_PLL_B:
temp_val = 128 * a + (128 * (b/c)) - 512;
inst->device_data.multiSynthNBParam.MSNx_P1_17_16 = (temp_val >> 15) & 0x2;
inst->device_data.multiSynthNBParam.MSNx_P1_15_8 = (temp_val >> 8) & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P1_7_0 = temp_val & 0xff;
temp_val = 0;
temp_val = 128 * b - c * (128 * (b/c));
inst->device_data.multiSynthNBParam.MSNx_P2_19_16 = (temp_val >> 15) & 0x4;
inst->device_data.multiSynthNBParam.MSNx_P2_15_8 = (temp_val >> 7) & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P2_7_0 = temp_val & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P3_19_16 = (c >> 15) & 0x4;
inst->device_data.multiSynthNBParam.MSNx_P3_15_8 = (c >> 7) & 0xff;
inst->device_data.multiSynthNBParam.MSNx_P3_7_0 = c & 0xff;
writeRegister(inst,SI5351_REG_MULTISYNTH_NB_0, (uint8_t*) &inst->device_data.multiSynthNBParam, sizeof(si5351_multiSynthNxParameters_t));
break;
}
// reset PLL's
cm_resetPLLs(inst, 1,1);
return 0;
}
int cm_setOutputMultiSynth(si5351_driver *inst,si5351_Outputs clk_output, uint32_t d, uint32_t e, uint32_t f){
/* Integer mode */
uint32_t P1 = 128 * d - 512;
uint32_t P2 = e;
uint32_t P3 = f;
switch(clk_output){
case SI5351_OUTPUT_0:
inst->device_data.multiSynth0Param.MSx_P1_17_16 = (P1 >> 16) & 0x3; // last division..
inst->device_data.multiSynth0Param.MSx_P1_15_8 = (P1 >> 8) & 0xff;
inst->device_data.multiSynth0Param.MSx_P1_7_0 = P1 & 0xff;
inst->device_data.multiSynth0Param.MSx_P2_19_16 = (P2 >> 16) & 0x3;
inst->device_data.multiSynth0Param.MSx_P2_15_8 = (P2 >> 8) & 0xff;
inst->device_data.multiSynth0Param.MSx_P2_7_0 = P2 & 0xff;
inst->device_data.multiSynth0Param.MSx_P3_19_16 = (P3 >> 12) & 0x3;
inst->device_data.multiSynth0Param.MSx_P3_15_8 = (P3 >> 8) & 0xff;
inst->device_data.multiSynth0Param.MSx_P3_7_0 = P3 & 0xff;
writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_0, (uint8_t*) &inst->device_data.multiSynth0Param, sizeof(si5351_multiSynthxParameters_t));
break;
case SI5351_OUTPUT_1:
inst->device_data.multiSynth1Param.MSx_P1_17_16 = (P1 >> 16) & 0x3; // last division..
inst->device_data.multiSynth1Param.MSx_P1_15_8 = (P1 >> 8) & 0xff;
inst->device_data.multiSynth1Param.MSx_P1_7_0 = P1 & 0xff;
inst->device_data.multiSynth1Param.MSx_P2_19_16 = (P2 >> 16) & 0x3;
inst->device_data.multiSynth1Param.MSx_P2_15_8 = (P2 >> 8) & 0xff;
inst->device_data.multiSynth1Param.MSx_P2_7_0 = P2 & 0xff;
inst->device_data.multiSynth1Param.MSx_P3_19_16 = (P3 >> 12) & 0x3;
inst->device_data.multiSynth1Param.MSx_P3_15_8 = (P3 >> 8) & 0xff;
inst->device_data.multiSynth1Param.MSx_P3_7_0 = P3 & 0xff;
writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_1, (uint8_t*) &inst->device_data.multiSynth1Param, sizeof(si5351_multiSynthxParameters_t));
break;
default:
break;
}
return 0;
}
int cm_setOutputEnable(si5351_driver *inst,si5351_Outputs clk_output, si5351_Outputs_state outputState){ int cm_setOutputEnable(si5351_driver *inst,si5351_Outputs clk_output, si5351_Outputs_state outputState){
si5351_outputEnableControl_t *outputEnableControl = (void*)&inst->device_data[1];
switch (clk_output) switch (clk_output)
{ {
case SI5351_OUTPUT_0: case SI5351_OUTPUT_0:
inst->device_data.outputEnableControl.CLK0_OEB = outputState; outputEnableControl->CLK0_OEB = outputState;
break; break;
case SI5351_OUTPUT_1: case SI5351_OUTPUT_1:
inst->device_data.outputEnableControl.CLK1_OEB = outputState; outputEnableControl->CLK1_OEB = outputState;
break; break;
case SI5351_OUTPUT_2: case SI5351_OUTPUT_2:
inst->device_data.outputEnableControl.CLK2_OEB = outputState; outputEnableControl->CLK2_OEB = outputState;
break; break;
default: default:
@@ -313,9 +154,7 @@ int cm_setOutputEnable(si5351_driver *inst,si5351_Outputs clk_output, si5351_Out
} }
writeRegister(inst,SI5351_REG_OUTPUT_ENABLE_CONTROL, sizeof(si5351_outputEnableControl_t));
writeRegister(inst,SI5351_REG_OUTPUT_ENABLE_CONTROL, (uint8_t*) &inst->device_data.outputEnableControl, sizeof(si5351_outputEnableControl_t));
return 0; return 0;
@@ -323,34 +162,34 @@ int cm_setOutputEnable(si5351_driver *inst,si5351_Outputs clk_output, si5351_Out
int cm_setCLKControl(si5351_driver *inst, si5351_Outputs clk_output, si5351_CLK_PDN clk_pdn){ int cm_setCLKControl(si5351_driver *inst, si5351_Outputs clk_output, si5351_CLK_PDN clk_pdn){
si5351_CLK_Control_t *CLKx_control = (void*)&inst->device_data[1];
CLKx_control->CLK_PDN = clk_pdn;
CLKx_control->CLK_INV = 0;
CLKx_control->CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA;
switch (clk_output) switch (clk_output)
{ {
case SI5351_OUTPUT_0: case SI5351_OUTPUT_0:
inst->device_data.CLK0_control.CLK_PDN = clk_pdn; CLKx_control->CLK_SRC = 0b11;
inst->device_data.CLK0_control.MSx_INT = 1; CLKx_control->MSx_SRC = 0;
inst->device_data.CLK0_control.CLK_SRC = 0b11; CLKx_control->MSx_INT = 0;
inst->device_data.CLK0_control.MSx_SRC = 0; writeRegister(inst,SI5351_REG_CLK_0_CONTROL, sizeof(si5351_CLK_Control_t));
inst->device_data.CLK0_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA;
writeRegister(inst,SI5351_REG_CLK_0_CONTROL, (uint8_t*) &inst->device_data.CLK0_control, sizeof(si5351_CLK_Control_t));
break; break;
case SI5351_OUTPUT_1: case SI5351_OUTPUT_1:
inst->device_data.CLK1_control.CLK_PDN = clk_pdn; CLKx_control->CLK_SRC = 0b11;
inst->device_data.CLK1_control.MSx_INT = 1; CLKx_control->MSx_SRC = 1;
inst->device_data.CLK1_control.MSx_SRC = 1; CLKx_control->MSx_INT = 0;
inst->device_data.CLK1_control.CLK_SRC = 0b11; writeRegister(inst,SI5351_REG_CLK_1_CONTROL, sizeof(si5351_CLK_Control_t));
inst->device_data.CLK1_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA;
writeRegister(inst,SI5351_REG_CLK_1_CONTROL, (uint8_t*) &inst->device_data.CLK1_control, sizeof(si5351_CLK_Control_t));
break; break;
case SI5351_OUTPUT_2: case SI5351_OUTPUT_2:
inst->device_data.CLK2_control.CLK_PDN = clk_pdn; CLKx_control->CLK_SRC = 0b00;
inst->device_data.CLK2_control.MSx_INT = 1; CLKx_control->MSx_SRC = 0;
inst->device_data.CLK2_control.MSx_SRC = 1; CLKx_control->MSx_INT = 1;
inst->device_data.CLK2_control.CLK_SRC = 0b00; writeRegister(inst,SI5351_REG_CLK_2_CONTROL, sizeof(si5351_CLK_Control_t));
inst->device_data.CLK2_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA;
writeRegister(inst,SI5351_REG_CLK_2_CONTROL, (uint8_t*) &inst->device_data.CLK2_control, sizeof(si5351_CLK_Control_t));
break; break;
default: default:
@@ -367,15 +206,17 @@ int cm_setCLKControl(si5351_driver *inst, si5351_Outputs clk_output, si5351_CLK_
int cm_setInputSource(si5351_driver *inst, si5351_ClkSource clk_source){ int cm_setInputSource(si5351_driver *inst, si5351_ClkSource clk_source){
si5351_PLLInputSource_t *pllInputSource = (void*)&inst->device_data[1];
switch(clk_source){ switch(clk_source){
case SI5351_CLK_SOURCE_XTAL: case SI5351_CLK_SOURCE_XTAL:
inst->device_data.pllInputSource.PLLA_SRC = 0; pllInputSource->PLLA_SRC = 0;
inst->device_data.pllInputSource.PLLB_SRC = 0; pllInputSource->PLLB_SRC = 0;
break; break;
case SI5351_CLK_SOURCE_CLOCKSOURCE: case SI5351_CLK_SOURCE_CLOCKSOURCE:
inst->device_data.pllInputSource.PLLA_SRC = 1; pllInputSource->PLLA_SRC = 1;
break; break;
default: default:
@@ -384,31 +225,25 @@ int cm_setInputSource(si5351_driver *inst, si5351_ClkSource clk_source){
} }
// Write to register: // Write to register:
writeRegister(inst,SI5351_REG_PLL_INPUT_SOURCE, (uint8_t*) &inst->device_data.pllInputSource, sizeof(si5351_PLLInputSource_t)); writeRegister(inst,SI5351_REG_PLL_INPUT_SOURCE, sizeof(si5351_PLLInputSource_t));
return 0; return 0;
} }
int cm_resetPLLs(si5351_driver *inst, uint8_t reset_PLLA, uint8_t reset_PLLB){ int cm_resetPLLs(si5351_driver *inst, uint8_t reset_PLLA, uint8_t reset_PLLB){
inst->device_data.PLL_Reset.PLLA_RST = (reset_PLLA != 0)? 1 : 0; si5351_PLL_Reset_t *PLL_Reset = (void*)&inst->device_data[1];
inst->device_data.PLL_Reset.PLLB_RST = (reset_PLLB != 0)? 1 : 0;
PLL_Reset->PLLA_RST = (reset_PLLA != 0)? 1 : 0;
PLL_Reset->PLLB_RST = (reset_PLLB != 0)? 1 : 0;
// Write to register: // Write to register:
writeRegister(inst,SI5351_REG_PLL_RESET, (uint8_t*) &inst->device_data.PLL_Reset, sizeof(si5351_PLL_Reset_t)); writeRegister(inst,SI5351_REG_PLL_RESET, sizeof(si5351_PLL_Reset_t));
return 0; return 0;
} }
uint8_t cm_si5351_getRevisionNumber(si5351_driver *inst){
// Read Device Status register:
readRegister(inst,0x00, (uint8_t *) &inst->device_data.deviceStatus, sizeof(si5351_deviceStat_t));
return inst->device_data.deviceStatus.REVID;
}
int cm_si5351_init(si5351_driver *inst, void *i2c_transfer_inst, setGet_I2C_Event_fpt i2c_transfer_evt){ int cm_si5351_init(si5351_driver *inst, void *i2c_transfer_inst, setGet_I2C_Event_fpt i2c_transfer_evt){
if(inst == NULL)return -1; if(inst == NULL)return -1;
@@ -420,30 +255,30 @@ int cm_si5351_init(si5351_driver *inst, void *i2c_transfer_inst, setGet_I2C_Even
int ret = 0; int ret = 0;
memset(&(inst->device_data),0x00,sizeof(si5351_data)); //memset(&(inst->device_data),0x00,sizeof(si5351_data));
/* Disable all outputs setting CLKx_DIS high */ /* Disable all outputs setting CLKx_DIS high */
uint8_t temp = 0xff; uint8_t temp = 0xff;
writeRegister(inst,SI5351_REG_OUTPUT_ENABLE_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_OUTPUT_ENABLE_CONTROL,temp);
/* Power down all output drivers */ /* Power down all output drivers */
temp = 0x80; temp = 0x80;
writeRegister(inst,SI5351_REG_CLK_0_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_CLK_0_CONTROL,temp);
writeRegister(inst,SI5351_REG_CLK_1_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_CLK_1_CONTROL,temp);
writeRegister(inst,SI5351_REG_CLK_2_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_CLK_2_CONTROL,temp);
writeRegister(inst,SI5351_REG_CLK_3_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_CLK_3_CONTROL,temp);
writeRegister(inst,SI5351_REG_CLK_4_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_CLK_4_CONTROL,temp);
writeRegister(inst,SI5351_REG_CLK_5_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_CLK_5_CONTROL,temp);
writeRegister(inst,SI5351_REG_CLK_6_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_CLK_6_CONTROL,temp);
writeRegister(inst,SI5351_REG_CLK_7_CONTROL,&temp,1); writeRegisterbyte(inst,SI5351_REG_CLK_7_CONTROL,temp);
temp = SI5351_CRYSTAL_LOAD_10PF; temp = SI5351_CRYSTAL_LOAD_10PF;
writeRegister(inst,SI5351_REG_CRYSTAL_LOAD_CAPACITANCE,&temp,1); writeRegisterbyte(inst,SI5351_REG_CRYSTAL_LOAD_CAPACITANCE,temp);
// Enable xtal clk.. // Enable xtal clk..
temp = 0b01000000; temp = 0b01000000;
writeRegister(inst,SI5351_REG_FANOUT_ENABLE,&temp,1); writeRegisterbyte(inst,SI5351_REG_FANOUT_ENABLE,temp);
return ret; return ret;

70
si5351_driver.h
View File

@@ -217,16 +217,7 @@ typedef struct{
si5351_CLK_Disable_State CLK2_DIS_STATE : 2; si5351_CLK_Disable_State CLK2_DIS_STATE : 2;
si5351_CLK_Disable_State CLK3_DIS_STATE : 2; // Clock x Disable State si5351_CLK_Disable_State CLK3_DIS_STATE : 2; // Clock x Disable State
}__attribute__((packed)) si5351_CLK3_0_Control_t; }__attribute__((packed)) si5351_CLK_Dis_Control_t;
typedef struct{
si5351_CLK_Disable_State CLK4_DIS_STATE : 2;
si5351_CLK_Disable_State CLK5_DIS_STATE : 2;
si5351_CLK_Disable_State CLK6_DIS_STATE : 2;
si5351_CLK_Disable_State CLK7_DIS_STATE : 2;
}__attribute__((packed)) si5351_CLK7_4_Control_t;
typedef struct{ typedef struct{
uint8_t MSNx_P3_15_8; // register 26 & 34 uint8_t MSNx_P3_15_8; // register 26 & 34
@@ -259,12 +250,8 @@ typedef struct{
}__attribute__((packed)) si5351_multiSynthxParameters_t; }__attribute__((packed)) si5351_multiSynthxParameters_t;
typedef struct { typedef struct {
uint8_t MS6_P1; uint8_t MSx_P1;
} __attribute__((packed))si5351_multiSynth6Parameters_t; } __attribute__((packed))si5351_multiSynth67Parameters_t;
typedef struct {
uint8_t MS7_P1;
} __attribute__((packed))si5351_multiSynth7Parameters_t;
typedef struct { typedef struct {
uint8_t Reserved_0 : 5; uint8_t Reserved_0 : 5;
@@ -274,60 +261,12 @@ typedef struct {
} __attribute__((packed))si5351_PLL_Reset_t; } __attribute__((packed))si5351_PLL_Reset_t;
typedef struct{
si5351_deviceStat_t deviceStatus; // 0x00
si5351_interruptStatusSticky_t ISR_StatusSticky; // 0x01
si5351_interruptStatusMask_t ISR_StatusMask; // 0x02
si5351_outputEnableControl_t outputEnableControl; // 0x03
si5351_outputEnableControlMask_t outputEnableControlMask; // 0x09
si5351_PLLInputSource_t pllInputSource; // 0x0F
si5351_CLK_Control_t CLK0_control; // 0x10
si5351_CLK_Control_t CLK1_control; // 0x11
si5351_CLK_Control_t CLK2_control; // 0x12
si5351_CLK_Control_t CLK3_control; // 0x13
si5351_CLK_Control_t CLK4_control; // 0x14
si5351_CLK_Control_t CLK5_control; // 0x15
si5351_CLK_Control_t CLK6_control; // 0x16
si5351_CLK_Control_t CLK7_control; // 0x17
si5351_CLK3_0_Control_t clk_3_0_DisableState;
si5351_CLK7_4_Control_t clk_7_4_DisableState;
si5351_multiSynthNxParameters_t multiSynthNAParam;
si5351_multiSynthNxParameters_t multiSynthNBParam;
si5351_multiSynthxParameters_t multiSynth0Param;
si5351_multiSynthxParameters_t multiSynth1Param;
si5351_multiSynthxParameters_t multiSynth2Param;
si5351_multiSynthxParameters_t multiSynth3Param;
si5351_multiSynthxParameters_t multiSynth4Param;
si5351_multiSynthxParameters_t multiSynth5Param;
si5351_multiSynth6Parameters_t multiSynth6Param;
si5351_multiSynth7Parameters_t multiSynth7Param;
si5351_OutputDivide R6_DIV : 3;
uint8_t Reserved_0 : 1;
si5351_OutputDivide R7_DIV : 3;
uint8_t Reserved_1 : 1;
si5351_PLL_Reset_t PLL_Reset;
}__attribute__((packed)) si5351_data;
typedef struct{ typedef struct{
void *i2c_transfer_inst; void *i2c_transfer_inst;
setGet_I2C_Event_fpt i2c_transfer_evt; setGet_I2C_Event_fpt i2c_transfer_evt;
si5351_data device_data; uint8_t device_data[15];
}__attribute__((packed)) si5351_driver; }__attribute__((packed)) si5351_driver;
@@ -336,7 +275,6 @@ int cm_si5351_init(si5351_driver *inst, void *i2c_transfer_inst, setGet_I2C_Even
uint8_t cm_si5351_getRevisionNumber(si5351_driver *inst); uint8_t cm_si5351_getRevisionNumber(si5351_driver *inst);
int cm_setInputSource(si5351_driver *inst, si5351_ClkSource clk_source); int cm_setInputSource(si5351_driver *inst, si5351_ClkSource clk_source);
int cm_setPLLParameters(si5351_driver *inst,si5351_PLLs sel_pll, uint32_t a, uint32_t b, uint32_t c); int cm_setPLLParameters(si5351_driver *inst,si5351_PLLs sel_pll, uint32_t a, uint32_t b, uint32_t c);
int cm_setOutputMultiSynth(si5351_driver *inst,si5351_Outputs clk_output, uint32_t d, uint32_t e, uint32_t f);
int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uint32_t MSx_P1, uint32_t MSx_P2, uint32_t MSx_P3); int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uint32_t MSx_P1, uint32_t MSx_P2, uint32_t MSx_P3);
int cm_setOutputEnable(si5351_driver *inst,si5351_Outputs clk_output, si5351_Outputs_state outputState); int cm_setOutputEnable(si5351_driver *inst,si5351_Outputs clk_output, si5351_Outputs_state outputState);
int cm_setCLKControl(si5351_driver *inst, si5351_Outputs clk_output, si5351_CLK_PDN clk_pdn); int cm_setCLKControl(si5351_driver *inst, si5351_Outputs clk_output, si5351_CLK_PDN clk_pdn);