first commit of light version of this driver..
This commit is contained in:
261
si5351_driver.c
261
si5351_driver.c
@@ -39,62 +39,33 @@ static int writeRegister(si5351_driver *inst,uint8_t data_addr, uint8_t *data, u
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// Write data:
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inst->i2c_transfer_evt(inst->i2c_transfer_inst,data_ptr,len+1, SI5351_I2C_SET);
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free(data_ptr);
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/* uint8_t txBuf[512] = {data_addr};
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uint8_t *txBuf_ptr = &txBuf[1];
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// add register addr to data:
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memcpy(txBuf_ptr,data,len);
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// Write data:
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inst->i2c_transfer_evt(inst->i2c_transfer_inst,txBuf,len+1, SI5351_I2C_SET);
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//HAL_Delay(1);*/
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return 0;
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}
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int cm_setPllParamRaw(si5351_driver *inst, si5351_PLLs sel_pll, uint32_t MSNx_P1, uint32_t MSNx_P2, uint32_t MSNx_P3){
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inst->device_data.multiSynthNxParam.MSNx_P1_17_16 = (MSNx_P1 >> 16) & 0x2;
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inst->device_data.multiSynthNxParam.MSNx_P1_15_8 = (MSNx_P1 >> 8) & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P1_7_0 = MSNx_P1 & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P2_19_16 = ((MSNx_P2 & 0x000F0000) >> 16);
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inst->device_data.multiSynthNxParam.MSNx_P2_15_8 = (MSNx_P2 >> 8) & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P2_7_0 = MSNx_P2 & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P3_19_16 = ((MSNx_P3 & 0x000F0000) >> 12);
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inst->device_data.multiSynthNxParam.MSNx_P3_15_8 = (MSNx_P3 >> 8) & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P3_7_0 = MSNx_P3 & 0xff;
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switch(sel_pll){
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case SI5351_PLL_A:
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inst->device_data.multiSynthNAParam.MSNx_P1_17_16 = (MSNx_P1 >> 16) & 0x2;
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inst->device_data.multiSynthNAParam.MSNx_P1_15_8 = (MSNx_P1 >> 8) & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P1_7_0 = MSNx_P1 & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P2_19_16 = ((MSNx_P2 & 0x000F0000) >> 16);
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inst->device_data.multiSynthNAParam.MSNx_P2_15_8 = (MSNx_P2 >> 8) & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P2_7_0 = MSNx_P2 & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P3_19_16 = ((MSNx_P3 & 0x000F0000) >> 12);
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inst->device_data.multiSynthNAParam.MSNx_P3_15_8 = (MSNx_P3 >> 8) & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P3_7_0 = MSNx_P3 & 0xff;
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writeRegister(inst,SI5351_REG_MULTISYNTH_NA_0, (uint8_t*) &inst->device_data.multiSynthNAParam, sizeof(si5351_multiSynthNxParameters_t));
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writeRegister(inst,SI5351_REG_MULTISYNTH_NA_0, (uint8_t*) &inst->device_data.multiSynthNxParam, sizeof(si5351_multiSynthNxParameters_t));
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break;
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case SI5351_PLL_B:
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inst->device_data.multiSynthNBParam.MSNx_P1_17_16 = (MSNx_P1 >> 16) & 0x2;
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inst->device_data.multiSynthNBParam.MSNx_P1_15_8 = (MSNx_P1 >> 8) & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P1_7_0 = MSNx_P1 & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P2_19_16 = ((MSNx_P2 & 0x000F0000) >> 16);
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inst->device_data.multiSynthNBParam.MSNx_P2_15_8 = (MSNx_P2 >> 8) & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P2_7_0 = MSNx_P2 & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P3_19_16 = ((MSNx_P3 & 0x000F0000) >> 12);
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inst->device_data.multiSynthNBParam.MSNx_P3_15_8 = (MSNx_P3 >> 8) & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P3_7_0 = MSNx_P3 & 0xff;
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writeRegister(inst,SI5351_REG_MULTISYNTH_NB_0, (uint8_t*) &inst->device_data.multiSynthNBParam, sizeof(si5351_multiSynthNxParameters_t));
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writeRegister(inst,SI5351_REG_MULTISYNTH_NB_0, (uint8_t*) &inst->device_data.multiSynthNxParam, sizeof(si5351_multiSynthNxParameters_t));
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break;
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default:
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@@ -110,62 +81,34 @@ int cm_setPllParamRaw(si5351_driver *inst, si5351_PLLs sel_pll, uint32_t MSNx_P1
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int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uint32_t MSx_P1, uint32_t MSx_P2, uint32_t MSx_P3){
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inst->device_data.multiSynthxParam.MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division..
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inst->device_data.multiSynthxParam.MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff;
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inst->device_data.multiSynthxParam.MSx_P1_7_0 = MSx_P1 & 0xff;
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inst->device_data.multiSynthxParam.MSx_P2_19_16 = (MSx_P2 >> 16) & 0x3;
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inst->device_data.multiSynthxParam.MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff;
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inst->device_data.multiSynthxParam.MSx_P2_7_0 = MSx_P2 & 0xff;
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inst->device_data.multiSynthxParam.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3;
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inst->device_data.multiSynthxParam.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff;
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inst->device_data.multiSynthxParam.MSx_P3_7_0 = MSx_P3 & 0xff;
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inst->device_data.multiSynthxParam.MSx_DIVBY4 = 0;
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inst->device_data.multiSynthxParam.Rx_DIV = 0;
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switch(clk_output){
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case SI5351_OUTPUT_0:
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inst->device_data.multiSynth0Param.MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division..
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inst->device_data.multiSynth0Param.MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff;
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inst->device_data.multiSynth0Param.MSx_P1_7_0 = MSx_P1 & 0xff;
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inst->device_data.multiSynth0Param.MSx_P2_19_16 = (MSx_P2 >> 16) & 0x3;
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inst->device_data.multiSynth0Param.MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff;
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inst->device_data.multiSynth0Param.MSx_P2_7_0 = MSx_P2 & 0xff;
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inst->device_data.multiSynth0Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3;
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inst->device_data.multiSynth0Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff;
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inst->device_data.multiSynth0Param.MSx_P3_7_0 = MSx_P3 & 0xff;
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inst->device_data.multiSynth0Param.MSx_DIVBY4 = 0;
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inst->device_data.multiSynth0Param.Rx_DIV = 0;
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writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_0, (uint8_t*) &inst->device_data.multiSynth0Param, sizeof(si5351_multiSynthxParameters_t));
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writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_0, (uint8_t*) &inst->device_data.multiSynthxParam, sizeof(si5351_multiSynthxParameters_t));
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break;
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case SI5351_OUTPUT_1:
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inst->device_data.multiSynth1Param.MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division..
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inst->device_data.multiSynth1Param.MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff;
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inst->device_data.multiSynth1Param.MSx_P1_7_0 = MSx_P1 & 0xff;
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inst->device_data.multiSynth1Param.MSx_P2_19_16 = (MSx_P2 >> 16) & 0x3;
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inst->device_data.multiSynth1Param.MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff;
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inst->device_data.multiSynth1Param.MSx_P2_7_0 = MSx_P2 & 0xff;
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inst->device_data.multiSynth1Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3;
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inst->device_data.multiSynth1Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff;
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inst->device_data.multiSynth1Param.MSx_P3_7_0 = MSx_P3 & 0xff;
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inst->device_data.multiSynth1Param.MSx_DIVBY4 = 0;
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inst->device_data.multiSynth1Param.Rx_DIV = 0;
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writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_1, (uint8_t*) &inst->device_data.multiSynth1Param, sizeof(si5351_multiSynthxParameters_t));
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writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_1, (uint8_t*) &inst->device_data.multiSynthxParam, sizeof(si5351_multiSynthxParameters_t));
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break;
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case SI5351_OUTPUT_2:
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inst->device_data.multiSynth2Param.MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division..
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inst->device_data.multiSynth2Param.MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff;
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inst->device_data.multiSynth2Param.MSx_P1_7_0 = MSx_P1 & 0xff;
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inst->device_data.multiSynth2Param.MSx_P2_19_16 = (MSx_P2 >> 16) & 0x3;
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inst->device_data.multiSynth2Param.MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff;
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inst->device_data.multiSynth2Param.MSx_P2_7_0 = MSx_P2 & 0xff;
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inst->device_data.multiSynth2Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3;
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inst->device_data.multiSynth2Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff;
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inst->device_data.multiSynth2Param.MSx_P3_7_0 = MSx_P3 & 0xff;
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inst->device_data.multiSynth2Param.MSx_DIVBY4 = 0;
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inst->device_data.multiSynth2Param.Rx_DIV = 0;
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writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_2, (uint8_t*) &inst->device_data.multiSynth2Param, sizeof(si5351_multiSynthxParameters_t));
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writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_2, (uint8_t*) &inst->device_data.multiSynthxParam, sizeof(si5351_multiSynthxParameters_t));
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break;
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default:
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break;
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@@ -176,57 +119,37 @@ int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uin
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return 0;
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}
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/*
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int cm_setPLLParameters(si5351_driver *inst,si5351_PLLs sel_pll, uint32_t a, uint32_t b, uint32_t c){
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uint32_t temp_val = 0;
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temp_val = (float)128 * (float)a + ((float)128 * ((float)b/(float)c)) - (float)512;
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inst->device_data.multiSynthNxParam.MSNx_P1_17_16 = (temp_val >> 16) & 0x2;
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inst->device_data.multiSynthNxParam.MSNx_P1_15_8 = (temp_val >> 8) & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P1_7_0 = temp_val & 0xff;
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temp_val = 0;
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temp_val = (uint32_t)(128 * b - c * floor(128 * ((float)b / (float)c)));
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inst->device_data.multiSynthNxParam.MSNx_P2_19_16 = ((temp_val & 0x000F0000) >> 16);
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inst->device_data.multiSynthNxParam.MSNx_P2_15_8 = (temp_val >> 8) & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P2_7_0 = temp_val & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P3_19_16 = ((c & 0x000F0000) >> 12);
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inst->device_data.multiSynthNxParam.MSNx_P3_15_8 = (c >> 8) & 0xff;
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inst->device_data.multiSynthNxParam.MSNx_P3_7_0 = c & 0xff;
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switch(sel_pll){
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case SI5351_PLL_A:
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temp_val = (float)128 * (float)a + ((float)128 * ((float)b/(float)c)) - (float)512;
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inst->device_data.multiSynthNAParam.MSNx_P1_17_16 = (temp_val >> 16) & 0x2;
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inst->device_data.multiSynthNAParam.MSNx_P1_15_8 = (temp_val >> 8) & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P1_7_0 = temp_val & 0xff;
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temp_val = 0;
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temp_val = (uint32_t)(128 * b - c * floor(128 * ((float)b / (float)c)));
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inst->device_data.multiSynthNAParam.MSNx_P2_19_16 = ((temp_val & 0x000F0000) >> 16);
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inst->device_data.multiSynthNAParam.MSNx_P2_15_8 = (temp_val >> 8) & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P2_7_0 = temp_val & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P3_19_16 = ((c & 0x000F0000) >> 12);
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inst->device_data.multiSynthNAParam.MSNx_P3_15_8 = (c >> 8) & 0xff;
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inst->device_data.multiSynthNAParam.MSNx_P3_7_0 = c & 0xff;
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writeRegister(inst,SI5351_REG_MULTISYNTH_NA_0, (uint8_t*) &inst->device_data.multiSynthNAParam, sizeof(si5351_multiSynthNxParameters_t));
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writeRegister(inst,SI5351_REG_MULTISYNTH_NA_0, (uint8_t*) &inst->device_data.multiSynthNxParam, sizeof(si5351_multiSynthNxParameters_t));
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break;
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case SI5351_PLL_B:
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temp_val = 128 * a + (128 * (b/c)) - 512;
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inst->device_data.multiSynthNBParam.MSNx_P1_17_16 = (temp_val >> 15) & 0x2;
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inst->device_data.multiSynthNBParam.MSNx_P1_15_8 = (temp_val >> 8) & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P1_7_0 = temp_val & 0xff;
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temp_val = 0;
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temp_val = 128 * b - c * (128 * (b/c));
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inst->device_data.multiSynthNBParam.MSNx_P2_19_16 = (temp_val >> 15) & 0x4;
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inst->device_data.multiSynthNBParam.MSNx_P2_15_8 = (temp_val >> 7) & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P2_7_0 = temp_val & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P3_19_16 = (c >> 15) & 0x4;
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inst->device_data.multiSynthNBParam.MSNx_P3_15_8 = (c >> 7) & 0xff;
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inst->device_data.multiSynthNBParam.MSNx_P3_7_0 = c & 0xff;
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writeRegister(inst,SI5351_REG_MULTISYNTH_NB_0, (uint8_t*) &inst->device_data.multiSynthNBParam, sizeof(si5351_multiSynthNxParameters_t));
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writeRegister(inst,SI5351_REG_MULTISYNTH_NB_0, (uint8_t*) &inst->device_data.multiSynthNxParam, sizeof(si5351_multiSynthNxParameters_t));
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break;
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}
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@@ -236,7 +159,7 @@ int cm_setPLLParameters(si5351_driver *inst,si5351_PLLs sel_pll, uint32_t a, uin
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return 0;
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}
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}*/
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int cm_setOutputMultiSynth(si5351_driver *inst,si5351_Outputs clk_output, uint32_t d, uint32_t e, uint32_t f){
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@@ -245,39 +168,31 @@ int cm_setOutputMultiSynth(si5351_driver *inst,si5351_Outputs clk_output, uint32
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uint32_t P2 = e;
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uint32_t P3 = f;
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inst->device_data.multiSynthxParam.MSx_P1_17_16 = (P1 >> 16) & 0x3; // last division..
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inst->device_data.multiSynthxParam.MSx_P1_15_8 = (P1 >> 8) & 0xff;
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inst->device_data.multiSynthxParam.MSx_P1_7_0 = P1 & 0xff;
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inst->device_data.multiSynthxParam.MSx_P2_19_16 = (P2 >> 16) & 0x3;
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inst->device_data.multiSynthxParam.MSx_P2_15_8 = (P2 >> 8) & 0xff;
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inst->device_data.multiSynthxParam.MSx_P2_7_0 = P2 & 0xff;
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inst->device_data.multiSynthxParam.MSx_P3_19_16 = (P3 >> 12) & 0x3;
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inst->device_data.multiSynthxParam.MSx_P3_15_8 = (P3 >> 8) & 0xff;
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inst->device_data.multiSynthxParam.MSx_P3_7_0 = P3 & 0xff;
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switch(clk_output){
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case SI5351_OUTPUT_0:
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inst->device_data.multiSynth0Param.MSx_P1_17_16 = (P1 >> 16) & 0x3; // last division..
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inst->device_data.multiSynth0Param.MSx_P1_15_8 = (P1 >> 8) & 0xff;
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inst->device_data.multiSynth0Param.MSx_P1_7_0 = P1 & 0xff;
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inst->device_data.multiSynth0Param.MSx_P2_19_16 = (P2 >> 16) & 0x3;
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inst->device_data.multiSynth0Param.MSx_P2_15_8 = (P2 >> 8) & 0xff;
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inst->device_data.multiSynth0Param.MSx_P2_7_0 = P2 & 0xff;
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inst->device_data.multiSynth0Param.MSx_P3_19_16 = (P3 >> 12) & 0x3;
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inst->device_data.multiSynth0Param.MSx_P3_15_8 = (P3 >> 8) & 0xff;
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inst->device_data.multiSynth0Param.MSx_P3_7_0 = P3 & 0xff;
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writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_0, (uint8_t*) &inst->device_data.multiSynth0Param, sizeof(si5351_multiSynthxParameters_t));
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writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_0, (uint8_t*) &inst->device_data.multiSynthxParam, sizeof(si5351_multiSynthxParameters_t));
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break;
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case SI5351_OUTPUT_1:
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inst->device_data.multiSynth1Param.MSx_P1_17_16 = (P1 >> 16) & 0x3; // last division..
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inst->device_data.multiSynth1Param.MSx_P1_15_8 = (P1 >> 8) & 0xff;
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inst->device_data.multiSynth1Param.MSx_P1_7_0 = P1 & 0xff;
|
||||
writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_1, (uint8_t*) &inst->device_data.multiSynthxParam, sizeof(si5351_multiSynthxParameters_t));
|
||||
break;
|
||||
|
||||
inst->device_data.multiSynth1Param.MSx_P2_19_16 = (P2 >> 16) & 0x3;
|
||||
inst->device_data.multiSynth1Param.MSx_P2_15_8 = (P2 >> 8) & 0xff;
|
||||
inst->device_data.multiSynth1Param.MSx_P2_7_0 = P2 & 0xff;
|
||||
|
||||
inst->device_data.multiSynth1Param.MSx_P3_19_16 = (P3 >> 12) & 0x3;
|
||||
inst->device_data.multiSynth1Param.MSx_P3_15_8 = (P3 >> 8) & 0xff;
|
||||
inst->device_data.multiSynth1Param.MSx_P3_7_0 = P3 & 0xff;
|
||||
|
||||
writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_1, (uint8_t*) &inst->device_data.multiSynth1Param, sizeof(si5351_multiSynthxParameters_t));
|
||||
case SI5351_OUTPUT_2:
|
||||
writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_2, (uint8_t*) &inst->device_data.multiSynthxParam, sizeof(si5351_multiSynthxParameters_t));
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -323,34 +238,26 @@ int cm_setOutputEnable(si5351_driver *inst,si5351_Outputs clk_output, si5351_Out
|
||||
|
||||
int cm_setCLKControl(si5351_driver *inst, si5351_Outputs clk_output, si5351_CLK_PDN clk_pdn){
|
||||
|
||||
|
||||
inst->device_data.CLKx_control.CLK_PDN = clk_pdn;
|
||||
inst->device_data.CLKx_control.MSx_INT = 1;
|
||||
inst->device_data.CLKx_control.CLK_SRC = 0b11;
|
||||
inst->device_data.CLKx_control.MSx_SRC = 0;
|
||||
inst->device_data.CLKx_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA;
|
||||
|
||||
switch (clk_output)
|
||||
{
|
||||
|
||||
case SI5351_OUTPUT_0:
|
||||
inst->device_data.CLK0_control.CLK_PDN = clk_pdn;
|
||||
inst->device_data.CLK0_control.MSx_INT = 1;
|
||||
inst->device_data.CLK0_control.CLK_SRC = 0b11;
|
||||
inst->device_data.CLK0_control.MSx_SRC = 0;
|
||||
inst->device_data.CLK0_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA;
|
||||
writeRegister(inst,SI5351_REG_CLK_0_CONTROL, (uint8_t*) &inst->device_data.CLK0_control, sizeof(si5351_CLK_Control_t));
|
||||
writeRegister(inst,SI5351_REG_CLK_0_CONTROL, (uint8_t*) &inst->device_data.CLKx_control, sizeof(si5351_CLK_Control_t));
|
||||
break;
|
||||
|
||||
case SI5351_OUTPUT_1:
|
||||
inst->device_data.CLK1_control.CLK_PDN = clk_pdn;
|
||||
inst->device_data.CLK1_control.MSx_INT = 1;
|
||||
inst->device_data.CLK1_control.MSx_SRC = 1;
|
||||
inst->device_data.CLK1_control.CLK_SRC = 0b11;
|
||||
inst->device_data.CLK1_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA;
|
||||
writeRegister(inst,SI5351_REG_CLK_1_CONTROL, (uint8_t*) &inst->device_data.CLK1_control, sizeof(si5351_CLK_Control_t));
|
||||
writeRegister(inst,SI5351_REG_CLK_1_CONTROL, (uint8_t*) &inst->device_data.CLKx_control, sizeof(si5351_CLK_Control_t));
|
||||
break;
|
||||
|
||||
case SI5351_OUTPUT_2:
|
||||
inst->device_data.CLK2_control.CLK_PDN = clk_pdn;
|
||||
inst->device_data.CLK2_control.MSx_INT = 1;
|
||||
inst->device_data.CLK2_control.MSx_SRC = 1;
|
||||
inst->device_data.CLK2_control.CLK_SRC = 0b00;
|
||||
inst->device_data.CLK2_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA;
|
||||
writeRegister(inst,SI5351_REG_CLK_2_CONTROL, (uint8_t*) &inst->device_data.CLK2_control, sizeof(si5351_CLK_Control_t));
|
||||
writeRegister(inst,SI5351_REG_CLK_2_CONTROL, (uint8_t*) &inst->device_data.CLKx_control, sizeof(si5351_CLK_Control_t));
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
@@ -217,16 +217,7 @@ typedef struct{
|
||||
si5351_CLK_Disable_State CLK2_DIS_STATE : 2;
|
||||
si5351_CLK_Disable_State CLK3_DIS_STATE : 2; // Clock x Disable State
|
||||
|
||||
}__attribute__((packed)) si5351_CLK3_0_Control_t;
|
||||
|
||||
typedef struct{
|
||||
|
||||
si5351_CLK_Disable_State CLK4_DIS_STATE : 2;
|
||||
si5351_CLK_Disable_State CLK5_DIS_STATE : 2;
|
||||
si5351_CLK_Disable_State CLK6_DIS_STATE : 2;
|
||||
si5351_CLK_Disable_State CLK7_DIS_STATE : 2;
|
||||
|
||||
}__attribute__((packed)) si5351_CLK7_4_Control_t;
|
||||
}__attribute__((packed)) si5351_CLK_Dis_Control_t;
|
||||
|
||||
typedef struct{
|
||||
uint8_t MSNx_P3_15_8; // register 26 & 34
|
||||
@@ -259,12 +250,8 @@ typedef struct{
|
||||
}__attribute__((packed)) si5351_multiSynthxParameters_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t MS6_P1;
|
||||
} __attribute__((packed))si5351_multiSynth6Parameters_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t MS7_P1;
|
||||
} __attribute__((packed))si5351_multiSynth7Parameters_t;
|
||||
uint8_t MSx_P1;
|
||||
} __attribute__((packed))si5351_multiSynth67Parameters_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t Reserved_0 : 5;
|
||||
@@ -282,44 +269,14 @@ typedef struct{
|
||||
si5351_outputEnableControl_t outputEnableControl; // 0x03
|
||||
si5351_outputEnableControlMask_t outputEnableControlMask; // 0x09
|
||||
si5351_PLLInputSource_t pllInputSource; // 0x0F
|
||||
|
||||
si5351_CLK_Control_t CLK0_control; // 0x10
|
||||
si5351_CLK_Control_t CLK1_control; // 0x11
|
||||
si5351_CLK_Control_t CLK2_control; // 0x12
|
||||
si5351_CLK_Control_t CLK3_control; // 0x13
|
||||
si5351_CLK_Control_t CLK4_control; // 0x14
|
||||
si5351_CLK_Control_t CLK5_control; // 0x15
|
||||
si5351_CLK_Control_t CLK6_control; // 0x16
|
||||
si5351_CLK_Control_t CLK7_control; // 0x17
|
||||
|
||||
si5351_CLK3_0_Control_t clk_3_0_DisableState;
|
||||
si5351_CLK7_4_Control_t clk_7_4_DisableState;
|
||||
|
||||
si5351_multiSynthNxParameters_t multiSynthNAParam;
|
||||
si5351_multiSynthNxParameters_t multiSynthNBParam;
|
||||
|
||||
si5351_multiSynthxParameters_t multiSynth0Param;
|
||||
si5351_multiSynthxParameters_t multiSynth1Param;
|
||||
si5351_multiSynthxParameters_t multiSynth2Param;
|
||||
si5351_multiSynthxParameters_t multiSynth3Param;
|
||||
si5351_multiSynthxParameters_t multiSynth4Param;
|
||||
si5351_multiSynthxParameters_t multiSynth5Param;
|
||||
|
||||
si5351_multiSynth6Parameters_t multiSynth6Param;
|
||||
si5351_multiSynth7Parameters_t multiSynth7Param;
|
||||
|
||||
si5351_OutputDivide R6_DIV : 3;
|
||||
uint8_t Reserved_0 : 1;
|
||||
si5351_OutputDivide R7_DIV : 3;
|
||||
uint8_t Reserved_1 : 1;
|
||||
|
||||
si5351_CLK_Control_t CLKx_control; // 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
|
||||
si5351_CLK_Dis_Control_t clk_DisableState;
|
||||
si5351_multiSynthNxParameters_t multiSynthNxParam;
|
||||
si5351_multiSynthxParameters_t multiSynthxParam;
|
||||
si5351_multiSynth67Parameters_t multiSynth67Param;
|
||||
si5351_OutputDivide Rx_DIV : 3; // R6 & R7
|
||||
si5351_PLL_Reset_t PLL_Reset;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
}__attribute__((packed)) si5351_data;
|
||||
|
||||
typedef struct{
|
||||
|
||||
Reference in New Issue
Block a user