From 4576085237f3156e1fea04d69f0df1fcc4e52407 Mon Sep 17 00:00:00 2001 From: "Christian L. V. Madsen" Date: Mon, 25 Nov 2024 18:52:42 +0100 Subject: [PATCH] included clock 2 output --- include/si5351_driver.h | 2 ++ si5351_driver.c | 41 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/include/si5351_driver.h b/include/si5351_driver.h index 76c9882..03f4782 100644 --- a/include/si5351_driver.h +++ b/include/si5351_driver.h @@ -114,9 +114,11 @@ typedef enum { SI5351_REG_MULTISYNTH_NB_0 = 34, SI5351_REG_MULTISYNTH_OUT_0 = 42, SI5351_REG_MULTISYNTH_OUT_1 = 50, + SI5351_REG_MULTISYNTH_OUT_2 = 58, SI5351_REG_PLL_RESET = 177, SI5351_REG_CRYSTAL_LOAD_CAPACITANCE = 183, + SI5351_REG_FANOUT_ENABLE = 187, diff --git a/si5351_driver.c b/si5351_driver.c index 213866d..f5562ea 100644 --- a/si5351_driver.c +++ b/si5351_driver.c @@ -124,6 +124,9 @@ int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uin inst->device_data.multiSynth0Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3; inst->device_data.multiSynth0Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff; inst->device_data.multiSynth0Param.MSx_P3_7_0 = MSx_P3 & 0xff; + + inst->device_data.multiSynth0Param.MSx_DIVBY4 = 0; + inst->device_data.multiSynth0Param.Rx_DIV = 0; writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_0, (uint8_t*) &inst->device_data.multiSynth0Param, sizeof(si5351_multiSynthxParameters_t)); @@ -141,9 +144,28 @@ int cm_setOutputMultiSynthRaw(si5351_driver *inst,si5351_Outputs clk_output, uin inst->device_data.multiSynth1Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3; inst->device_data.multiSynth1Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff; inst->device_data.multiSynth1Param.MSx_P3_7_0 = MSx_P3 & 0xff; + inst->device_data.multiSynth1Param.MSx_DIVBY4 = 0; + inst->device_data.multiSynth1Param.Rx_DIV = 0; writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_1, (uint8_t*) &inst->device_data.multiSynth1Param, sizeof(si5351_multiSynthxParameters_t)); break; + + case SI5351_OUTPUT_2: + inst->device_data.multiSynth2Param.MSx_P1_17_16 = (MSx_P1 >> 16) & 0x3; // last division.. + inst->device_data.multiSynth2Param.MSx_P1_15_8 = (MSx_P1 >> 8) & 0xff; + inst->device_data.multiSynth2Param.MSx_P1_7_0 = MSx_P1 & 0xff; + + inst->device_data.multiSynth2Param.MSx_P2_19_16 = (MSx_P2 >> 16) & 0x3; + inst->device_data.multiSynth2Param.MSx_P2_15_8 = (MSx_P2 >> 8) & 0xff; + inst->device_data.multiSynth2Param.MSx_P2_7_0 = MSx_P2 & 0xff; + + inst->device_data.multiSynth2Param.MSx_P3_19_16 = (MSx_P3 >> 12) & 0x3; + inst->device_data.multiSynth2Param.MSx_P3_15_8 = (MSx_P3 >> 8) & 0xff; + inst->device_data.multiSynth2Param.MSx_P3_7_0 = MSx_P3 & 0xff; + inst->device_data.multiSynth2Param.MSx_DIVBY4 = 0; + inst->device_data.multiSynth2Param.Rx_DIV = 0; + + writeRegister(inst,SI5351_REG_MULTISYNTH_OUT_2, (uint8_t*) &inst->device_data.multiSynth2Param, sizeof(si5351_multiSynthxParameters_t)); default: break; @@ -282,6 +304,10 @@ int cm_setOutputEnable(si5351_driver *inst,si5351_Outputs clk_output, si5351_Out inst->device_data.outputEnableControl.CLK1_OEB = outputState; break; + case SI5351_OUTPUT_2: + inst->device_data.outputEnableControl.CLK2_OEB = outputState; + break; + default: break; @@ -304,7 +330,7 @@ int cm_setCLKControl(si5351_driver *inst, si5351_Outputs clk_output, si5351_CLK_ inst->device_data.CLK0_control.CLK_PDN = clk_pdn; inst->device_data.CLK0_control.MSx_INT = 1; inst->device_data.CLK0_control.CLK_SRC = 0b11; - inst->device_data.CLK1_control.MSx_SRC = 0; + inst->device_data.CLK0_control.MSx_SRC = 0; inst->device_data.CLK0_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA; writeRegister(inst,SI5351_REG_CLK_0_CONTROL, (uint8_t*) &inst->device_data.CLK0_control, sizeof(si5351_CLK_Control_t)); break; @@ -318,6 +344,15 @@ int cm_setCLKControl(si5351_driver *inst, si5351_Outputs clk_output, si5351_CLK_ writeRegister(inst,SI5351_REG_CLK_1_CONTROL, (uint8_t*) &inst->device_data.CLK1_control, sizeof(si5351_CLK_Control_t)); break; + case SI5351_OUTPUT_2: + inst->device_data.CLK2_control.CLK_PDN = clk_pdn; + inst->device_data.CLK2_control.MSx_INT = 1; + inst->device_data.CLK2_control.MSx_SRC = 1; + inst->device_data.CLK2_control.CLK_SRC = 0b00; + inst->device_data.CLK2_control.CLK_IDRV = SI5351_DRIVE_STRENGTH_8MA; + writeRegister(inst,SI5351_REG_CLK_2_CONTROL, (uint8_t*) &inst->device_data.CLK2_control, sizeof(si5351_CLK_Control_t)); + break; + default: break; @@ -405,6 +440,10 @@ int cm_si5351_init(si5351_driver *inst, void *i2c_transfer_inst, setGet_I2C_Even temp = SI5351_CRYSTAL_LOAD_10PF; writeRegister(inst,SI5351_REG_CRYSTAL_LOAD_CAPACITANCE,&temp,1); + + // Enable xtal clk.. + temp = 0b01000000; + writeRegister(inst,SI5351_REG_FANOUT_ENABLE,&temp,1); return ret;