diff --git a/storno_cqp6xx_digital_xtal/Debug/cqm6xx_app.d b/storno_cqp6xx_digital_xtal/Debug/cqm6xx_app.d index d0ff23e..bf0def0 100644 --- a/storno_cqp6xx_digital_xtal/Debug/cqm6xx_app.d +++ b/storno_cqp6xx_digital_xtal/Debug/cqm6xx_app.d @@ -5,6 +5,7 @@ cqm6xx_app.d cqm6xx_app.o: .././cqm6xx_app.c .././cqm6xx_app.h \ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\string.h \ .././si5351_driver/include/si5351_driver.h \ .././avr_gpio_driver/avr_gpio.h \ .././avr_gpio_driver/../avr_global_config.h \ @@ -39,6 +40,8 @@ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h: +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\string.h: + .././si5351_driver/include/si5351_driver.h: .././avr_gpio_driver/avr_gpio.h: diff --git a/storno_cqp6xx_digital_xtal/Debug/cqm6xx_app.o b/storno_cqp6xx_digital_xtal/Debug/cqm6xx_app.o index ce14ffb..8a3f78f 100644 Binary files a/storno_cqp6xx_digital_xtal/Debug/cqm6xx_app.o and b/storno_cqp6xx_digital_xtal/Debug/cqm6xx_app.o differ diff --git a/storno_cqp6xx_digital_xtal/Debug/main.o b/storno_cqp6xx_digital_xtal/Debug/main.o index e1e7143..53f7a19 100644 Binary files a/storno_cqp6xx_digital_xtal/Debug/main.o and b/storno_cqp6xx_digital_xtal/Debug/main.o differ diff --git a/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.elf b/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.elf index 5e2bd1b..6f5f4e0 100644 Binary files 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b/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.lss @@ -3,33 +3,33 @@ storno_cqp6xx_digital_xtal.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000008 00803f00 00000ec7 00000f7b 2**0 + 0 .data 00000006 00803f00 00000bb7 00000c6b 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 00000ec2 00000000 00000000 000000b4 2**1 + 1 .text 00000bb2 00000000 00000000 000000b4 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000005 00008ec2 00000ec2 00000f76 2**0 + 2 .rodata 00000005 00008bb2 00000bb2 00000c66 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .bss 00000063 00803f08 00803f08 00000f83 2**0 + 3 .bss 00000062 00803f06 00803f06 00000c71 2**0 ALLOC - 4 .comment 00000030 00000000 00000000 00000f83 2**0 + 4 .comment 00000030 00000000 00000000 00000c71 2**0 CONTENTS, READONLY - 5 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000fb4 2**2 + 5 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000ca4 2**2 CONTENTS, READONLY - 6 .debug_aranges 00000260 00000000 00000000 00000ff0 2**3 + 6 .debug_aranges 00000258 00000000 00000000 00000ce0 2**3 CONTENTS, READONLY, DEBUGGING - 7 .debug_info 0000539c 00000000 00000000 00001250 2**0 + 7 .debug_info 00005174 00000000 00000000 00000f38 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_abbrev 00001d9f 00000000 00000000 000065ec 2**0 + 8 .debug_abbrev 00001d9f 00000000 00000000 000060ac 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_line 000018a4 00000000 00000000 0000838b 2**0 + 9 .debug_line 0000184c 00000000 00000000 00007e4b 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_frame 00000694 00000000 00000000 00009c30 2**2 + 10 .debug_frame 0000064c 00000000 00000000 00009698 2**2 CONTENTS, READONLY, DEBUGGING - 11 .debug_str 0000227c 00000000 00000000 0000a2c4 2**0 + 11 .debug_str 000022b5 00000000 00000000 00009ce4 2**0 CONTENTS, READONLY, DEBUGGING - 12 .debug_loc 000023ef 00000000 00000000 0000c540 2**0 + 12 .debug_loc 0000223e 00000000 00000000 0000bf99 2**0 CONTENTS, READONLY, DEBUGGING - 13 .debug_ranges 000001a0 00000000 00000000 0000e92f 2**0 + 13 .debug_ranges 00000198 00000000 00000000 0000e1d7 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -74,18 +74,18 @@ Disassembly of section .text: 40: 1f e3 ldi r17, 0x3F ; 63 42: a0 e0 ldi r26, 0x00 ; 0 44: bf e3 ldi r27, 0x3F ; 63 - 46: e7 ec ldi r30, 0xC7 ; 199 - 48: fe e0 ldi r31, 0x0E ; 14 + 46: e7 eb ldi r30, 0xB7 ; 183 + 48: fb e0 ldi r31, 0x0B ; 11 4a: 02 c0 rjmp .+4 ; 0x50 <__do_copy_data+0x10> 4c: 05 90 lpm r0, Z+ 4e: 0d 92 st X+, r0 - 50: a8 30 cpi r26, 0x08 ; 8 + 50: a6 30 cpi r26, 0x06 ; 6 52: b1 07 cpc r27, r17 54: d9 f7 brne .-10 ; 0x4c <__do_copy_data+0xc> 00000056 <__do_clear_bss>: 56: 2f e3 ldi r18, 0x3F ; 63 - 58: a8 e0 ldi r26, 0x08 ; 8 + 58: a6 e0 ldi r26, 0x06 ; 6 5a: bf e3 ldi r27, 0x3F ; 63 5c: 01 c0 rjmp .+2 ; 0x60 <.do_clear_bss_start> @@ -93,11 +93,11 @@ Disassembly of section .text: 5e: 1d 92 st X+, r1 00000060 <.do_clear_bss_start>: - 60: ab 36 cpi r26, 0x6B ; 107 + 60: a8 36 cpi r26, 0x68 ; 104 62: b2 07 cpc r27, r18 64: e1 f7 brne .-8 ; 0x5e <.do_clear_bss_loop> - 66: 8b d3 rcall .+1814 ; 0x77e
- 68: 2a c7 rjmp .+3668 ; 0xebe <_exit> + 66: 38 d3 rcall .+1648 ; 0x6d8
+ 68: a2 c5 rjmp .+2884 ; 0xbae <_exit> 0000006a <__bad_interrupt>: 6a: ca cf rjmp .-108 ; 0x0 <__vectors> @@ -108,7 +108,7 @@ Disassembly of section .text: #include #include -void cm_EEPROM_write(uint8_t* address, uint8_t *data, uint8_t length) { +void cm_EEPROM_write(uint8_t *address, uint8_t *data, uint8_t length) { 6c: ef 92 push r14 6e: ff 92 push r15 70: 0f 93 push r16 @@ -133,10 +133,10 @@ void cm_EEPROM_write(uint8_t* address, uint8_t *data, uint8_t length) { 8c: 60 81 ld r22, Z 8e: 8e 0d add r24, r14 90: 9f 1d adc r25, r15 - 92: 01 d7 rcall .+3586 ; 0xe96 + 92: 79 d5 rcall .+2802 ; 0xb86 #include -void cm_EEPROM_write(uint8_t* address, uint8_t *data, uint8_t length) { +void cm_EEPROM_write(uint8_t *address, uint8_t *data, uint8_t length) { for (uint8_t i = 0; i < length; i++) { @@ -173,6 +173,7 @@ void cm_EEPROM_read(uint8_t* address, uint8_t *data, uint8_t length) { ba: 7b 01 movw r14, r22 bc: d4 2f mov r29, r20 + for (uint8_t i = 0; i < length; i++) { be: c0 e0 ldi r28, 0x00 ; 0 c0: 0b c0 rjmp .+22 ; 0xd8 @@ -184,23 +185,22 @@ void cm_EEPROM_read(uint8_t* address, uint8_t *data, uint8_t length) { ca: 19 1f adc r17, r25 cc: 8c 0d add r24, r12 ce: 9d 1d adc r25, r13 - d0: da d6 rcall .+3508 ; 0xe86 + d0: 52 d5 rcall .+2724 ; 0xb76 d2: f8 01 movw r30, r16 d4: 80 83 st Z, r24 -} void cm_EEPROM_read(uint8_t* address, uint8_t *data, uint8_t length) { + for (uint8_t i = 0; i < length; i++) { d6: cf 5f subi r28, 0xFF ; 255 d8: cd 17 cp r28, r29 da: 98 f3 brcs .-26 ; 0xc2 + data[i] = eeprom_read_byte(address+i); + + } - // Directly read the data from NVMCTRL.DATA - data[i] = NVMCTRL.DATA; - - }*/ } dc: df 91 pop r29 de: cf 91 pop r28 @@ -225,7 +225,7 @@ int gpio_get_level(avr_gpio_ports port, uint8_t pin){ case GPIO_PORTA: return (PORTA.IN & (1 << pin)) ? 1 : 0; - f2: 20 91 08 04 lds r18, 0x0408 ; 0x800408 + f2: 20 91 08 04 lds r18, 0x0408 ; 0x800408 f6: 30 e0 ldi r19, 0x00 ; 0 f8: 02 c0 rjmp .+4 ; 0xfe fa: 35 95 asr r19 @@ -249,12 +249,6 @@ int gpio_get_level(avr_gpio_ports port, uint8_t pin){ 110: 08 95 ret 00000112 : - *data = TWI0.MDATA; - - // Send stop condition - TWI0.MCTRLB = TWI_MCMD_STOP_gc; - return 0; // Success -} 112: e0 e1 ldi r30, 0x10 ; 16 114: f8 e0 ldi r31, 0x08 ; 8 116: 84 81 ldd r24, Z+4 ; 0x04 @@ -265,23 +259,21 @@ int gpio_get_level(avr_gpio_ports port, uint8_t pin){ 120: 08 95 ret 00000122 : - 122: 80 93 17 08 sts 0x0817, r24 ; 0x800817 - 126: 80 91 15 08 lds r24, 0x0815 ; 0x800815 + 122: 80 93 17 08 sts 0x0817, r24 ; 0x800817 + 126: 80 91 15 08 lds r24, 0x0815 ; 0x800815 12a: 80 7c andi r24, 0xC0 ; 192 12c: e1 f3 breq .-8 ; 0x126 - 12e: 90 91 15 08 lds r25, 0x0815 ; 0x800815 + 12e: 90 91 15 08 lds r25, 0x0815 ; 0x800815 132: 89 2f mov r24, r25 134: 80 71 andi r24, 0x10 ; 16 136: 94 ff sbrs r25, 4 138: 04 c0 rjmp .+8 ; 0x142 13a: 83 e0 ldi r24, 0x03 ; 3 - 13c: 80 93 14 08 sts 0x0814, r24 ; 0x800814 + 13c: 80 93 14 08 sts 0x0814, r24 ; 0x800814 140: 81 e0 ldi r24, 0x01 ; 1 142: 08 95 ret 00000144 : - -int i2c_write(uint8_t dev_addr, void *data, uint32_t len){ 144: cf 92 push r12 146: df 92 push r13 148: ef 92 push r14 @@ -291,125 +283,56 @@ int i2c_write(uint8_t dev_addr, void *data, uint32_t len){ 150: eb 01 movw r28, r22 152: 69 01 movw r12, r18 154: 7a 01 movw r14, r20 - - // Check length - if(len == 0) return CM_I2C_NOK; 156: 23 2b or r18, r19 158: 24 2b or r18, r20 15a: 25 2b or r18, r21 15c: 81 f1 breq .+96 ; 0x1be - - // Make a pointer to data - uint8_t *dp = data; - - // Send register address to I2C device, we would like to read from.. - if(i2c_write_devAddr(dev_addr) != CM_I2C_OK)return CM_I2C_NOK; 15e: e1 df rcall .-62 ; 0x122 160: 81 11 cpse r24, r1 162: 30 c0 rjmp .+96 ; 0x1c4 - - do - { - // Prepare and send new data. - TWI0.MDATA = *dp++; 164: 9e 01 movw r18, r28 166: 2f 5f subi r18, 0xFF ; 255 168: 3f 4f sbci r19, 0xFF ; 255 16a: 88 81 ld r24, Y - 16c: 80 93 18 08 sts 0x0818, r24 ; 0x800818 - - while (!(TWI0.MSTATUS & TWI_WIF_bm)); - 170: 80 91 15 08 lds r24, 0x0815 ; 0x800815 + 16c: 80 93 18 08 sts 0x0818, r24 ; 0x800818 + 170: 80 91 15 08 lds r24, 0x0815 ; 0x800815 174: 86 ff sbrs r24, 6 176: fc cf rjmp .-8 ; 0x170 - - if (TWI0.MSTATUS & TWI_RXACK_bm) { - 178: 80 91 15 08 lds r24, 0x0815 ; 0x800815 + 178: 80 91 15 08 lds r24, 0x0815 ; 0x800815 17c: 84 ff sbrs r24, 4 17e: 06 c0 rjmp .+12 ; 0x18c - // NACK received - TWI0.MCTRLB = TWI_MCMD_STOP_gc; // Send stop condition 180: 83 e0 ldi r24, 0x03 ; 3 - 182: 80 93 14 08 sts 0x0814, r24 ; 0x800814 - return 1; // Error: NACK received + 182: 80 93 14 08 sts 0x0814, r24 ; 0x800814 186: 81 e0 ldi r24, 0x01 ; 1 188: 90 e0 ldi r25, 0x00 ; 0 18a: 1e c0 rjmp .+60 ; 0x1c8 - } - - // Check for bus error and reset if it happens.. - if (TWI0.MSTATUS & (TWI_ARBLOST_bm | TWI_BUSERR_bm)) { - 18c: 80 91 15 08 lds r24, 0x0815 ; 0x800815 + 18c: 80 91 15 08 lds r24, 0x0815 ; 0x800815 190: 8c 70 andi r24, 0x0C ; 12 192: 21 f0 breq .+8 ; 0x19c - i2c_reset(); 194: be df rcall .-132 ; 0x112 - return 1; 196: 81 e0 ldi r24, 0x01 ; 1 198: 90 e0 ldi r25, 0x00 ; 0 19a: 16 c0 rjmp .+44 ; 0x1c8 - } - - if (TWI0.MSTATUS & TWI_RXACK_bm) - 19c: 80 91 15 08 lds r24, 0x0815 ; 0x800815 + 19c: 80 91 15 08 lds r24, 0x0815 ; 0x800815 1a0: 84 fd sbrc r24, 4 1a2: 07 c0 rjmp .+14 ; 0x1b2 - break; - - }while(--len); 1a4: 81 e0 ldi r24, 0x01 ; 1 1a6: c8 1a sub r12, r24 1a8: d1 08 sbc r13, r1 1aa: e1 08 sbc r14, r1 1ac: f1 08 sbc r15, r1 - if(i2c_write_devAddr(dev_addr) != CM_I2C_OK)return CM_I2C_NOK; - - do - { - // Prepare and send new data. - TWI0.MDATA = *dp++; 1ae: e9 01 movw r28, r18 - } - - if (TWI0.MSTATUS & TWI_RXACK_bm) - break; - - }while(--len); 1b0: c9 f6 brne .-78 ; 0x164 - - // Send stop condition - TWI0.MCTRLB = TWI_MCMD_STOP_gc; 1b2: 83 e0 ldi r24, 0x03 ; 3 - 1b4: 80 93 14 08 sts 0x0814, r24 ; 0x800814 - - - return CM_I2C_OK; + 1b4: 80 93 14 08 sts 0x0814, r24 ; 0x800814 1b8: 80 e0 ldi r24, 0x00 ; 0 1ba: 90 e0 ldi r25, 0x00 ; 0 1bc: 05 c0 rjmp .+10 ; 0x1c8 -} - -int i2c_write(uint8_t dev_addr, void *data, uint32_t len){ - - // Check length - if(len == 0) return CM_I2C_NOK; 1be: 8f ef ldi r24, 0xFF ; 255 1c0: 9f ef ldi r25, 0xFF ; 255 1c2: 02 c0 rjmp .+4 ; 0x1c8 - - // Make a pointer to data - uint8_t *dp = data; - - // Send register address to I2C device, we would like to read from.. - if(i2c_write_devAddr(dev_addr) != CM_I2C_OK)return CM_I2C_NOK; 1c4: 8f ef ldi r24, 0xFF ; 255 1c6: 9f ef ldi r25, 0xFF ; 255 - // Send stop condition - TWI0.MCTRLB = TWI_MCMD_STOP_gc; - - - return CM_I2C_OK; -} 1c8: df 91 pop r29 1ca: cf 91 pop r28 1cc: ff 90 pop r15 @@ -419,8 +342,6 @@ int i2c_write(uint8_t dev_addr, void *data, uint32_t len){ 1d4: 08 95 ret 000001d6 : - -int i2c_read(uint8_t dev_addr, void *data, uint32_t len){ 1d6: cf 92 push r12 1d8: df 92 push r13 1da: ef 92 push r14 @@ -430,65 +351,35 @@ int i2c_read(uint8_t dev_addr, void *data, uint32_t len){ 1e2: eb 01 movw r28, r22 1e4: 69 01 movw r12, r18 1e6: 7a 01 movw r14, r20 - - uint8_t *dp = data; - - if (len == 0) 1e8: 23 2b or r18, r19 1ea: 24 2b or r18, r20 1ec: 25 2b or r18, r21 1ee: 69 f1 breq .+90 ; 0x24a - return 1; - - // Send register address to I2C device, we would like to read from.. - if(i2c_write_devAddr(dev_addr | 1) != CM_I2C_OK)return CM_I2C_NOK; 1f0: 81 60 ori r24, 0x01 ; 1 1f2: 97 df rcall .-210 ; 0x122 1f4: 88 23 and r24, r24 1f6: c9 f0 breq .+50 ; 0x22a 1f8: 2b c0 rjmp .+86 ; 0x250 - - while (len--) { - - while (!(TWI0.MSTATUS & (TWI_WIF_bm | TWI_RIF_bm))); - 1fa: 80 91 15 08 lds r24, 0x0815 ; 0x800815 + 1fa: 80 91 15 08 lds r24, 0x0815 ; 0x800815 1fe: 80 7c andi r24, 0xC0 ; 192 200: e1 f3 breq .-8 ; 0x1fa - - *dp++ = TWI0.MDATA; 202: ce 01 movw r24, r28 204: 01 96 adiw r24, 0x01 ; 1 - 206: 20 91 18 08 lds r18, 0x0818 ; 0x800818 + 206: 20 91 18 08 lds r18, 0x0818 ; 0x800818 20a: 28 83 st Y, r18 - if (len == 0) { 20c: 41 15 cp r20, r1 20e: 51 05 cpc r21, r1 210: 61 05 cpc r22, r1 212: 71 05 cpc r23, r1 214: 21 f4 brne .+8 ; 0x21e - TWI0.MCTRLB = TWI_ACKACT_NACK_gc; 216: 24 e0 ldi r18, 0x04 ; 4 - 218: 20 93 14 08 sts 0x0814, r18 ; 0x800814 + 218: 20 93 14 08 sts 0x0814, r18 ; 0x800814 21c: 03 c0 rjmp .+6 ; 0x224 - } else { - TWI0.MCTRLB = TWI_ACKACT_ACK_gc | TWI_MCMD_RECVTRANS_gc; 21e: 22 e0 ldi r18, 0x02 ; 2 - 220: 20 93 14 08 sts 0x0814, r18 ; 0x800814 + 220: 20 93 14 08 sts 0x0814, r18 ; 0x800814 224: 6a 01 movw r12, r20 226: 7b 01 movw r14, r22 - - - return CM_I2C_OK; -} - -int i2c_read(uint8_t dev_addr, void *data, uint32_t len){ 228: ec 01 movw r28, r24 - return 1; - - // Send register address to I2C device, we would like to read from.. - if(i2c_write_devAddr(dev_addr | 1) != CM_I2C_OK)return CM_I2C_NOK; - - while (len--) { 22a: b7 01 movw r22, r14 22c: a6 01 movw r20, r12 22e: 41 50 subi r20, 0x01 ; 1 @@ -499,39 +390,16 @@ int i2c_read(uint8_t dev_addr, void *data, uint32_t len){ 238: ce 28 or r12, r14 23a: cf 28 or r12, r15 23c: f1 f6 brne .-68 ; 0x1fa - TWI0.MCTRLB = TWI_ACKACT_ACK_gc | TWI_MCMD_RECVTRANS_gc; - } - } - - // Send stop condition - TWI0.MCTRLB = TWI_MCMD_STOP_gc; 23e: 83 e0 ldi r24, 0x03 ; 3 - 240: 80 93 14 08 sts 0x0814, r24 ; 0x800814 - - return 0; + 240: 80 93 14 08 sts 0x0814, r24 ; 0x800814 244: 80 e0 ldi r24, 0x00 ; 0 246: 90 e0 ldi r25, 0x00 ; 0 248: 05 c0 rjmp .+10 ; 0x254 -int i2c_read(uint8_t dev_addr, void *data, uint32_t len){ - - uint8_t *dp = data; - - if (len == 0) - return 1; 24a: 81 e0 ldi r24, 0x01 ; 1 24c: 90 e0 ldi r25, 0x00 ; 0 24e: 02 c0 rjmp .+4 ; 0x254 - - // Send register address to I2C device, we would like to read from.. - if(i2c_write_devAddr(dev_addr | 1) != CM_I2C_OK)return CM_I2C_NOK; 250: 8f ef ldi r24, 0xFF ; 255 252: 9f ef ldi r25, 0xFF ; 255 - TWI0.MCTRLB = TWI_MCMD_STOP_gc; - - return 0; - - -} 254: df 91 pop r29 256: cf 91 pop r28 258: ff 90 pop r15 @@ -541,97 +409,53 @@ int i2c_read(uint8_t dev_addr, void *data, uint32_t len){ 260: 08 95 ret 00000262 : - -int i2c_IsDeviceReady(uint8_t dev_addr){ - - TWI0.MADDR = dev_addr | 0; - 262: 80 93 17 08 sts 0x0817, r24 ; 0x800817 - - // Wait for acknowledgment - while (!(TWI0.MSTATUS & TWI_WIF_bm)); - 266: 80 91 15 08 lds r24, 0x0815 ; 0x800815 + 262: 80 93 17 08 sts 0x0817, r24 ; 0x800817 + 266: 80 91 15 08 lds r24, 0x0815 ; 0x800815 26a: 86 ff sbrs r24, 6 26c: fc cf rjmp .-8 ; 0x266 - - if (TWI0.MSTATUS & TWI_RXACK_bm) { - 26e: 80 91 15 08 lds r24, 0x0815 ; 0x800815 + 26e: 80 91 15 08 lds r24, 0x0815 ; 0x800815 272: 84 ff sbrs r24, 4 274: 06 c0 rjmp .+12 ; 0x282 - // NACK received - TWI0.MCTRLB = TWI_MCMD_STOP_gc; // Send stop condition 276: 83 e0 ldi r24, 0x03 ; 3 - 278: 80 93 14 08 sts 0x0814, r24 ; 0x800814 - return 1; // Error: NACK received + 278: 80 93 14 08 sts 0x0814, r24 ; 0x800814 27c: 81 e0 ldi r24, 0x01 ; 1 27e: 90 e0 ldi r25, 0x00 ; 0 280: 08 95 ret - } - - // Send stop condition - TWI0.MCTRLB = TWI_MCMD_STOP_gc; 282: 83 e0 ldi r24, 0x03 ; 3 - 284: 80 93 14 08 sts 0x0814, r24 ; 0x800814 - return CM_I2C_OK; // Success + 284: 80 93 14 08 sts 0x0814, r24 ; 0x800814 288: 80 e0 ldi r24, 0x00 ; 0 28a: 90 e0 ldi r25, 0x00 ; 0 - -} 28c: 08 95 ret 0000028e : - - -int cm_i2c_init(void *i2c_inst){ - - PORTA.DIR &= ~(1 << 2); // Clear bit 2 (PA2) 28e: e0 e0 ldi r30, 0x00 ; 0 290: f4 e0 ldi r31, 0x04 ; 4 292: 80 81 ld r24, Z 294: 8b 7f andi r24, 0xFB ; 251 296: 80 83 st Z, r24 - PORTA.DIR &= ~(1 << 3); // Clear bit 3 (PA3) 298: 80 81 ld r24, Z 29a: 87 7f andi r24, 0xF7 ; 247 29c: 80 83 st Z, r24 - - // Set the baud rate for 100kHz with a typical rise time of 300 ns - TWI0.MBAUD = 11; 29e: a0 e1 ldi r26, 0x10 ; 16 2a0: b8 e0 ldi r27, 0x08 ; 8 2a2: 8b e0 ldi r24, 0x0B ; 11 2a4: 16 96 adiw r26, 0x06 ; 6 2a6: 8c 93 st X, r24 2a8: 16 97 sbiw r26, 0x06 ; 6 - - // Enable the TWI master and set it to enable operation - TWI0.MCTRLA = TWI_ENABLE_bm; 2aa: 81 e0 ldi r24, 0x01 ; 1 2ac: 13 96 adiw r26, 0x03 ; 3 2ae: 8c 93 st X, r24 2b0: 13 97 sbiw r26, 0x03 ; 3 - - /* Set bus state idle */ - TWI0.MSTATUS = TWI_BUSSTATE_IDLE_gc; 2b2: 15 96 adiw r26, 0x05 ; 5 2b4: 8c 93 st X, r24 - - // Enable the internal pull-ups for PA2 (SDA) and PA3 (SCL) - PORTA.PIN2CTRL = PORT_PULLUPEN_bm; 2b6: 88 e0 ldi r24, 0x08 ; 8 2b8: 82 8b std Z+18, r24 ; 0x12 - PORTA.PIN3CTRL = PORT_PULLUPEN_bm; 2ba: 83 8b std Z+19, r24 ; 0x13 - return CM_I2C_OK; -} 2bc: 80 e0 ldi r24, 0x00 ; 0 2be: 90 e0 ldi r25, 0x00 ; 0 2c0: 08 95 ret 000002c2 : - - - -int cm_i2c_addDev(cm_i2c_device_t *inst, void *i2c_inst, uint8_t dev_addr){ 2c2: ef 92 push r14 2c4: ff 92 push r15 2c6: 0f 93 push r16 @@ -640,45 +464,22 @@ int cm_i2c_addDev(cm_i2c_device_t *inst, void *i2c_inst, uint8_t dev_addr){ 2cc: 8c 01 movw r16, r24 2ce: 7b 01 movw r14, r22 2d0: c4 2f mov r28, r20 - - //if(i2c_inst == NULL) return CM_I2C_NOK; - - // Check if device responds! - if(i2c_IsDeviceReady((dev_addr << 1)) != CM_I2C_OK)return CM_I2C_NO_DEVICE; 2d2: 84 2f mov r24, r20 2d4: 88 0f add r24, r24 2d6: c5 df rcall .-118 ; 0x262 2d8: 00 97 sbiw r24, 0x00 ; 0 2da: 49 f4 brne .+18 ; 0x2ee - - // add device info if device responds! - inst->i2c_transfer_inst = i2c_inst; 2dc: f8 01 movw r30, r16 2de: e0 82 st Z, r14 2e0: f1 82 std Z+1, r15 ; 0x01 - inst->dev_addr = (dev_addr << 1) & 0b11111110; 2e2: 4c 2f mov r20, r28 2e4: 50 e0 ldi r21, 0x00 ; 0 2e6: 44 0f add r20, r20 2e8: 55 1f adc r21, r21 2ea: 42 83 std Z+2, r20 ; 0x02 - - return CM_I2C_OK; 2ec: 02 c0 rjmp .+4 ; 0x2f2 -int cm_i2c_addDev(cm_i2c_device_t *inst, void *i2c_inst, uint8_t dev_addr){ - - //if(i2c_inst == NULL) return CM_I2C_NOK; - - // Check if device responds! - if(i2c_IsDeviceReady((dev_addr << 1)) != CM_I2C_OK)return CM_I2C_NO_DEVICE; 2ee: 8e ef ldi r24, 0xFE ; 254 2f0: 9f ef ldi r25, 0xFF ; 255 - // add device info if device responds! - inst->i2c_transfer_inst = i2c_inst; - inst->dev_addr = (dev_addr << 1) & 0b11111110; - - return CM_I2C_OK; -} 2f2: cf 91 pop r28 2f4: 1f 91 pop r17 2f6: 0f 91 pop r16 @@ -687,86 +488,30 @@ int cm_i2c_addDev(cm_i2c_device_t *inst, void *i2c_inst, uint8_t dev_addr){ 2fc: 08 95 ret 000002fe : - - -int cm_i2c_transfer(cm_i2c_device_t *inst, uint8_t *data, uint32_t len, i2c_setget_cm_t set_get){ 2fe: 0f 93 push r16 - - if(inst == NULL) return CM_I2C_NOK; 300: 00 97 sbiw r24, 0x00 ; 0 302: 81 f0 breq .+32 ; 0x324 304: fc 01 movw r30, r24 - - // Check if device responds! - //if(i2c_IsDeviceReady(inst->dev_addr) != CM_I2C_OK)return CM_I2C_NO_DEVICE; - - switch(set_get){ 306: 00 23 and r16, r16 308: 19 f0 breq .+6 ; 0x310 30a: 01 30 cpi r16, 0x01 ; 1 30c: 31 f0 breq .+12 ; 0x31a 30e: 0d c0 rjmp .+26 ; 0x32a - - case I2C_CM_GET: - //HAL_I2C_Master_Receive(inst->i2c_transfer_inst, inst->dev_addr, data, len, 1); - i2c_read(inst->dev_addr, data, len); 310: 82 81 ldd r24, Z+2 ; 0x02 312: 61 df rcall .-318 ; 0x1d6 - break; - - - } - - return CM_I2C_OK; 314: 80 e0 ldi r24, 0x00 ; 0 316: 90 e0 ldi r25, 0x00 ; 0 - switch(set_get){ - - case I2C_CM_GET: - //HAL_I2C_Master_Receive(inst->i2c_transfer_inst, inst->dev_addr, data, len, 1); - i2c_read(inst->dev_addr, data, len); - break; 318: 0a c0 rjmp .+20 ; 0x32e - - case I2C_CM_SET: - //HAL_I2C_Master_Transmit(inst->i2c_transfer_inst, inst->dev_addr, data, len, 1); - i2c_write(inst->dev_addr, data, len); 31a: 82 81 ldd r24, Z+2 ; 0x02 31c: 13 df rcall .-474 ; 0x144 - break; - - - } - - return CM_I2C_OK; 31e: 80 e0 ldi r24, 0x00 ; 0 320: 90 e0 ldi r25, 0x00 ; 0 - break; - - case I2C_CM_SET: - //HAL_I2C_Master_Transmit(inst->i2c_transfer_inst, inst->dev_addr, data, len, 1); - i2c_write(inst->dev_addr, data, len); - break; 322: 05 c0 rjmp .+10 ; 0x32e -} - - -int cm_i2c_transfer(cm_i2c_device_t *inst, uint8_t *data, uint32_t len, i2c_setget_cm_t set_get){ - - if(inst == NULL) return CM_I2C_NOK; 324: 8f ef ldi r24, 0xFF ; 255 326: 9f ef ldi r25, 0xFF ; 255 328: 02 c0 rjmp .+4 ; 0x32e - break; - - - } - - return CM_I2C_OK; 32a: 80 e0 ldi r24, 0x00 ; 0 32c: 90 e0 ldi r25, 0x00 ; 0 - -} 32e: 0f 91 pop r16 330: 08 95 ret @@ -796,11 +541,11 @@ ISR(USART0_RXC_vect) { 352: ff 93 push r31 // Read received data if(uart_rx_evt_fpt != NULL) uart_rx_evt_fpt(USART0.RXDATAL); - 354: e0 91 08 3f lds r30, 0x3F08 ; 0x803f08 <__data_end> - 358: f0 91 09 3f lds r31, 0x3F09 ; 0x803f09 <__data_end+0x1> + 354: e0 91 06 3f lds r30, 0x3F06 ; 0x803f06 <__data_end> + 358: f0 91 07 3f lds r31, 0x3F07 ; 0x803f07 <__data_end+0x1> 35c: 30 97 sbiw r30, 0x00 ; 0 35e: 19 f0 breq .+6 ; 0x366 <__vector_22+0x34> - 360: 80 91 00 08 lds r24, 0x0800 ; 0x800800 + 360: 80 91 00 08 lds r24, 0x0800 ; 0x800800 364: 09 95 icall //cm_uart_send(USART0.RXDATAL); @@ -870,22 +615,22 @@ void cm_uart_init(void *rtx_inst, get_UART_Event_fpt uart_rx_evt_fp){ // Enable RX interrupt USART0.CTRLA = USART_RXCIE_bm; // Enable receive interrupt 3b4: 80 e8 ldi r24, 0x80 ; 128 - 3b6: 80 93 05 08 sts 0x0805, r24 ; 0x800805 + 3b6: 80 93 05 08 sts 0x0805, r24 ; 0x800805 s_inst = rtx_inst; uart_rx_evt_fpt = uart_rx_evt_fp; - 3ba: 60 93 08 3f sts 0x3F08, r22 ; 0x803f08 <__data_end> - 3be: 70 93 09 3f sts 0x3F09, r23 ; 0x803f09 <__data_end+0x1> + 3ba: 60 93 06 3f sts 0x3F06, r22 ; 0x803f06 <__data_end> + 3be: 70 93 07 3f sts 0x3F07, r23 ; 0x803f07 <__data_end+0x1> } // Clear any existing receive complete interrupt flag by reading RXDATAL if (USART0.STATUS & USART_RXCIF_bm) { - 3c2: 80 91 04 08 lds r24, 0x0804 ; 0x800804 + 3c2: 80 91 04 08 lds r24, 0x0804 ; 0x800804 3c6: 88 23 and r24, r24 3c8: 24 f4 brge .+8 ; 0x3d2 volatile uint8_t dummy = USART0.RXDATAL; // Read RXDATAL to clear the flag - 3ca: 80 91 00 08 lds r24, 0x0800 ; 0x800800 + 3ca: 80 91 00 08 lds r24, 0x0800 ; 0x800800 3ce: 89 83 std Y+1, r24 ; 0x01 (void)dummy; // Silence unused variable warning 3d0: 89 81 ldd r24, Y+1 ; 0x01 @@ -917,7 +662,7 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ static cm_msg_startcode_states_t state = CM_MSGSYNC_STATE_INIT; switch (state) - 3e8: e0 91 43 3f lds r30, 0x3F43 ; 0x803f43 + 3e8: e0 91 41 3f lds r30, 0x3F41 ; 0x803f41 3ec: e2 30 cpi r30, 0x02 ; 2 3ee: 29 f1 breq .+74 ; 0x43a <__LOCK_REGION_LENGTH__+0x3a> 3f0: 28 f4 brcc .+10 ; 0x3fc @@ -935,13 +680,13 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ case CM_MSGSYNC_STATE_INIT: state = (rx_byte == startCode[state])? CM_MSGSYNC_STATE_2 : CM_MSGSYNC_STATE_INIT; 406: f0 e0 ldi r31, 0x00 ; 0 - 408: ee 53 subi r30, 0x3E ; 62 - 40a: f1 47 sbci r31, 0x71 ; 113 + 408: ee 54 subi r30, 0x4E ; 78 + 40a: f4 47 sbci r31, 0x74 ; 116 40c: 20 81 ld r18, Z 40e: 91 e0 ldi r25, 0x01 ; 1 410: 28 13 cpse r18, r24 412: 90 e0 ldi r25, 0x00 ; 0 - 414: 90 93 43 3f sts 0x3F43, r25 ; 0x803f43 + 414: 90 93 41 3f sts 0x3F41, r25 ; 0x803f41 default: state = CM_MSGSYNC_STATE_INIT; break; @@ -961,15 +706,15 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ case CM_MSGSYNC_STATE_2: state = (rx_byte == startCode[state])? CM_MSGSYNC_STATE_3 : CM_MSGSYNC_STATE_INIT; 41e: f0 e0 ldi r31, 0x00 ; 0 - 420: ee 53 subi r30, 0x3E ; 62 - 422: f1 47 sbci r31, 0x71 ; 113 + 420: ee 54 subi r30, 0x4E ; 78 + 422: f4 47 sbci r31, 0x74 ; 116 424: 90 81 ld r25, Z 426: 89 13 cpse r24, r25 428: 02 c0 rjmp .+4 ; 0x42e <__LOCK_REGION_LENGTH__+0x2e> 42a: 82 e0 ldi r24, 0x02 ; 2 42c: 01 c0 rjmp .+2 ; 0x430 <__LOCK_REGION_LENGTH__+0x30> 42e: 80 e0 ldi r24, 0x00 ; 0 - 430: 80 93 43 3f sts 0x3F43, r24 ; 0x803f43 + 430: 80 93 41 3f sts 0x3F41, r24 ; 0x803f41 default: state = CM_MSGSYNC_STATE_INIT; break; @@ -989,15 +734,15 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ case CM_MSGSYNC_STATE_3: state = (rx_byte == startCode[state])? CM_MSGSYNC_STATE_4 : CM_MSGSYNC_STATE_INIT; 43a: f0 e0 ldi r31, 0x00 ; 0 - 43c: ee 53 subi r30, 0x3E ; 62 - 43e: f1 47 sbci r31, 0x71 ; 113 + 43c: ee 54 subi r30, 0x4E ; 78 + 43e: f4 47 sbci r31, 0x74 ; 116 440: 90 81 ld r25, Z 442: 89 13 cpse r24, r25 444: 02 c0 rjmp .+4 ; 0x44a <__LOCK_REGION_LENGTH__+0x4a> 446: 83 e0 ldi r24, 0x03 ; 3 448: 01 c0 rjmp .+2 ; 0x44c <__LOCK_REGION_LENGTH__+0x4c> 44a: 80 e0 ldi r24, 0x00 ; 0 - 44c: 80 93 43 3f sts 0x3F43, r24 ; 0x803f43 + 44c: 80 93 41 3f sts 0x3F41, r24 ; 0x803f41 default: state = CM_MSGSYNC_STATE_INIT; break; @@ -1017,15 +762,15 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ case CM_MSGSYNC_STATE_4: state = (rx_byte == startCode[state])? CM_MSGSYNC_STATE_5 : CM_MSGSYNC_STATE_INIT; 456: f0 e0 ldi r31, 0x00 ; 0 - 458: ee 53 subi r30, 0x3E ; 62 - 45a: f1 47 sbci r31, 0x71 ; 113 + 458: ee 54 subi r30, 0x4E ; 78 + 45a: f4 47 sbci r31, 0x74 ; 116 45c: 90 81 ld r25, Z 45e: 89 13 cpse r24, r25 460: 02 c0 rjmp .+4 ; 0x466 <__LOCK_REGION_LENGTH__+0x66> 462: 84 e0 ldi r24, 0x04 ; 4 464: 01 c0 rjmp .+2 ; 0x468 <__LOCK_REGION_LENGTH__+0x68> 466: 80 e0 ldi r24, 0x00 ; 0 - 468: 80 93 43 3f sts 0x3F43, r24 ; 0x803f43 + 468: 80 93 41 3f sts 0x3F41, r24 ; 0x803f41 default: state = CM_MSGSYNC_STATE_INIT; break; @@ -1044,7 +789,7 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ case CM_MSGSYNC_STATE_5: state = CM_MSGSYNC_STATE_INIT; - 472: 10 92 43 3f sts 0x3F43, r1 ; 0x803f43 + 472: 10 92 41 3f sts 0x3F41, r1 ; 0x803f41 return 0; 476: 80 e0 ldi r24, 0x00 ; 0 478: 90 e0 ldi r25, 0x00 ; 0 @@ -1053,7 +798,7 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ default: state = CM_MSGSYNC_STATE_INIT; - 47c: 10 92 43 3f sts 0x3F43, r1 ; 0x803f43 + 47c: 10 92 41 3f sts 0x3F41, r1 ; 0x803f41 break; } @@ -1072,7 +817,7 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ static uint8_t data_bytes_idx = 0; switch (state) - 486: 90 91 42 3f lds r25, 0x3F42 ; 0x803f42 + 486: 90 91 40 3f lds r25, 0x3F40 ; 0x803f40 48a: 93 30 cpi r25, 0x03 ; 3 48c: d1 f0 breq .+52 ; 0x4c2 48e: 28 f4 brcc .+10 ; 0x49a @@ -1093,37 +838,37 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ 4a6: 89 2b or r24, r25 4a8: 19 f4 brne .+6 ; 0x4b0 4aa: 81 e0 ldi r24, 0x01 ; 1 - 4ac: 80 93 42 3f sts 0x3F42, r24 ; 0x803f42 + 4ac: 80 93 40 3f sts 0x3F40, r24 ; 0x803f40 data_bytes_idx = 0; - 4b0: 10 92 41 3f sts 0x3F41, r1 ; 0x803f41 + 4b0: 10 92 3f 3f sts 0x3F3F, r1 ; 0x803f3f break; 4b4: 39 c0 rjmp .+114 ; 0x528 case CM_MSG_DECODE_STATE_GET_SIZE_BYTE: msg.msg_data_size = rx_byte; - 4b6: 80 93 0a 3f sts 0x3F0A, r24 ; 0x803f0a + 4b6: 80 93 08 3f sts 0x3F08, r24 ; 0x803f08 state = CM_MSG_DECODE_STATE_GET_CRC_BYTE1; 4ba: 83 e0 ldi r24, 0x03 ; 3 - 4bc: 80 93 42 3f sts 0x3F42, r24 ; 0x803f42 + 4bc: 80 93 40 3f sts 0x3F40, r24 ; 0x803f40 break; 4c0: 33 c0 rjmp .+102 ; 0x528 case CM_MSG_DECODE_STATE_GET_CRC_BYTE1: msg.msg_data_crc = (rx_byte << 8) & 0xff00; - 4c2: ea e0 ldi r30, 0x0A ; 10 + 4c2: e8 e0 ldi r30, 0x08 ; 8 4c4: ff e3 ldi r31, 0x3F ; 63 4c6: 11 82 std Z+1, r1 ; 0x01 4c8: 82 83 std Z+2, r24 ; 0x02 state = CM_MSG_DECODE_STATE_GET_CRC_BYTE2; 4ca: 84 e0 ldi r24, 0x04 ; 4 - 4cc: 80 93 42 3f sts 0x3F42, r24 ; 0x803f42 + 4cc: 80 93 40 3f sts 0x3F40, r24 ; 0x803f40 break; 4d0: 2b c0 rjmp .+86 ; 0x528 case CM_MSG_DECODE_STATE_GET_CRC_BYTE2: msg.msg_data_crc |= rx_byte & 0xff; - 4d2: ea e0 ldi r30, 0x0A ; 10 + 4d2: e8 e0 ldi r30, 0x08 ; 8 4d4: ff e3 ldi r31, 0x3F ; 63 4d6: 21 81 ldd r18, Z+1 ; 0x01 4d8: 32 81 ldd r19, Z+2 ; 0x02 @@ -1134,41 +879,41 @@ int cm_msgSync_Byte_DecodeSC(uint8_t rx_byte){ 4e2: 92 83 std Z+2, r25 ; 0x02 state = CM_MSG_DECODE_STATE_GET_DATA; 4e4: 85 e0 ldi r24, 0x05 ; 5 - 4e6: 80 93 42 3f sts 0x3F42, r24 ; 0x803f42 + 4e6: 80 93 40 3f sts 0x3F40, r24 ; 0x803f40 break; 4ea: 1e c0 rjmp .+60 ; 0x528 case CM_MSG_DECODE_STATE_GET_DATA: msg.msg_data[data_bytes_idx] = rx_byte; - 4ec: 90 91 41 3f lds r25, 0x3F41 ; 0x803f41 + 4ec: 90 91 3f 3f lds r25, 0x3F3F ; 0x803f3f 4f0: e9 2f mov r30, r25 4f2: f0 e0 ldi r31, 0x00 ; 0 - 4f4: e6 5f subi r30, 0xF6 ; 246 + 4f4: e8 5f subi r30, 0xF8 ; 248 4f6: f0 4c sbci r31, 0xC0 ; 192 4f8: 83 83 std Z+3, r24 ; 0x03 data_bytes_idx++; 4fa: 81 e0 ldi r24, 0x01 ; 1 4fc: 89 0f add r24, r25 - 4fe: 80 93 41 3f sts 0x3F41, r24 ; 0x803f41 + 4fe: 80 93 3f 3f sts 0x3F3F, r24 ; 0x803f3f if(data_bytes_idx >= msg.msg_data_size){ - 502: 90 91 0a 3f lds r25, 0x3F0A ; 0x803f0a + 502: 90 91 08 3f lds r25, 0x3F08 ; 0x803f08 506: 89 17 cp r24, r25 508: 78 f0 brcs .+30 ; 0x528 // calculate CRC.. // Run function pointer msg evt.. s_msg_cmplete_evt_fpt(s_msg_cmplete_evt_inst,&(msg.msg_data[0])); - 50a: e0 91 46 3f lds r30, 0x3F46 ; 0x803f46 - 50e: f0 91 47 3f lds r31, 0x3F47 ; 0x803f47 - 512: 6d e0 ldi r22, 0x0D ; 13 + 50a: e0 91 44 3f lds r30, 0x3F44 ; 0x803f44 + 50e: f0 91 45 3f lds r31, 0x3F45 ; 0x803f45 + 512: 6b e0 ldi r22, 0x0B ; 11 514: 7f e3 ldi r23, 0x3F ; 63 - 516: 80 91 44 3f lds r24, 0x3F44 ; 0x803f44 - 51a: 90 91 45 3f lds r25, 0x3F45 ; 0x803f45 + 516: 80 91 42 3f lds r24, 0x3F42 ; 0x803f42 + 51a: 90 91 43 3f lds r25, 0x3F43 ; 0x803f43 51e: 09 95 icall state = CM_MSG_WAIT_FOR_STARTCODE; - 520: 10 92 42 3f sts 0x3F42, r1 ; 0x803f42 + 520: 10 92 40 3f sts 0x3F40, r1 ; 0x803f40 data_bytes_idx = 0; - 524: 10 92 41 3f sts 0x3F41, r1 ; 0x803f41 + 524: 10 92 3f 3f sts 0x3F3F, r1 ; 0x803f3f } break; @@ -1191,16 +936,16 @@ void cm_MsgCompleteEvt_Register(void *msg_cmplete_evt_inst, Get_msgComplete_Even 536: 41 f0 breq .+16 ; 0x548 s_msg_cmplete_evt_inst = msg_cmplete_evt_inst; - 538: 80 93 44 3f sts 0x3F44, r24 ; 0x803f44 - 53c: 90 93 45 3f sts 0x3F45, r25 ; 0x803f45 + 538: 80 93 42 3f sts 0x3F42, r24 ; 0x803f42 + 53c: 90 93 43 3f sts 0x3F43, r25 ; 0x803f43 s_msg_cmplete_evt_fpt = msg_cmplete_evt_fp; - 540: 60 93 46 3f sts 0x3F46, r22 ; 0x803f46 - 544: 70 93 47 3f sts 0x3F47, r23 ; 0x803f47 + 540: 60 93 44 3f sts 0x3F44, r22 ; 0x803f44 + 544: 70 93 45 3f sts 0x3F45, r23 ; 0x803f45 548: 08 95 ret 0000054a : - storno_pll_param_msg temp_msg; - uint8_t *msg_ptr = (void*)&temp_msg; + //storno_pll_param_msg temp_msg; + //uint8_t *msg_ptr = (void*)&temp_msg; static uint8_t isStructValid(storno_xtal_app_t *inst){ @@ -1215,8 +960,8 @@ static uint8_t isStructValid(storno_xtal_app_t *inst){ 556: 21 f4 brne .+8 ; 0x560 558: 81 e0 ldi r24, 0x01 ; 1 55a: 08 95 ret - storno_pll_param_msg temp_msg; - uint8_t *msg_ptr = (void*)&temp_msg; + //storno_pll_param_msg temp_msg; + //uint8_t *msg_ptr = (void*)&temp_msg; static uint8_t isStructValid(storno_xtal_app_t *inst){ @@ -1230,1457 +975,992 @@ static uint8_t isStructValid(storno_xtal_app_t *inst){ } 562: 08 95 ret -00000564 : - } +00000564 : + cm_setCLKControl(inst->si5351_dev,output,SI5351_CLK_POWER_UP); } - -static void cqm_setPLLParam(storno_xtal_app_t *inst, si5351_PLLs pll_num, si5351_Outputs output){ - 564: 9f 92 push r9 - 566: af 92 push r10 - 568: bf 92 push r11 - 56a: cf 92 push r12 - 56c: df 92 push r13 - 56e: ef 92 push r14 - 570: ff 92 push r15 - 572: 0f 93 push r16 - 574: 1f 93 push r17 - 576: cf 93 push r28 - 578: df 93 push r29 - 57a: ec 01 movw r28, r24 - 57c: 94 2e mov r9, r20 +uint8_t size = 0; +static void cqm6xx_app_loadPLLParam(storno_xtal_app_t *inst){ + 564: cf 93 push r28 + 566: df 93 push r29 - cm_setPllParamRaw(inst->si5351_dev,pll_num, inst->pll_param_ptr->MSNx_P1, inst->pll_param_ptr->MSNx_P2, inst->pll_param_ptr->MSNx_P3); - 57e: ec 81 ldd r30, Y+4 ; 0x04 - 580: fd 81 ldd r31, Y+5 ; 0x05 - 582: a1 84 ldd r10, Z+9 ; 0x09 - 584: b2 84 ldd r11, Z+10 ; 0x0a - 586: c3 84 ldd r12, Z+11 ; 0x0b - 588: d4 84 ldd r13, Z+12 ; 0x0c - 58a: e5 80 ldd r14, Z+5 ; 0x05 - 58c: f6 80 ldd r15, Z+6 ; 0x06 - 58e: 07 81 ldd r16, Z+7 ; 0x07 - 590: 10 85 ldd r17, Z+8 ; 0x08 - 592: 21 81 ldd r18, Z+1 ; 0x01 - 594: 32 81 ldd r19, Z+2 ; 0x02 - 596: 43 81 ldd r20, Z+3 ; 0x03 - 598: 54 81 ldd r21, Z+4 ; 0x04 - 59a: 8a 81 ldd r24, Y+2 ; 0x02 - 59c: 9b 81 ldd r25, Y+3 ; 0x03 - 59e: 4a d2 rcall .+1172 ; 0xa34 + size = sizeof(storno_pll_param_msg); + 568: 29 e1 ldi r18, 0x19 ; 25 + 56a: 20 93 46 3f sts 0x3F46, r18 ; 0x803f46 + + // Read settings for PLLA first + cm_EEPROM_read((uint8_t*)PLLA_SETTINGS_EEPROM_ADDR,(uint8_t *)&inst->pll_param_data,size); + 56e: ec 01 movw r28, r24 + 570: 24 96 adiw r28, 0x04 ; 4 + 572: 49 e1 ldi r20, 0x19 ; 25 + 574: be 01 movw r22, r28 + 576: 80 e0 ldi r24, 0x00 ; 0 + 578: 90 e0 ldi r25, 0x00 ; 0 + 57a: 96 dd rcall .-1236 ; 0xa8 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - 5a0: 81 e4 ldi r24, 0x41 ; 65 - 5a2: 93 e0 ldi r25, 0x03 ; 3 - 5a4: 01 97 sbiw r24, 0x01 ; 1 - 5a6: f1 f7 brne .-4 ; 0x5a4 - 5a8: 00 00 nop - _delay_ms(1); - cm_setOutputMultiSynthRaw(inst->si5351_dev,output, inst->pll_param_ptr->MSx_P1, inst->pll_param_ptr->MSx_P2, inst->pll_param_ptr->MSx_P3); - 5aa: ec 81 ldd r30, Y+4 ; 0x04 - 5ac: fd 81 ldd r31, Y+5 ; 0x05 - 5ae: a5 88 ldd r10, Z+21 ; 0x15 - 5b0: b6 88 ldd r11, Z+22 ; 0x16 - 5b2: c7 88 ldd r12, Z+23 ; 0x17 - 5b4: d0 8c ldd r13, Z+24 ; 0x18 - 5b6: e1 88 ldd r14, Z+17 ; 0x11 - 5b8: f2 88 ldd r15, Z+18 ; 0x12 - 5ba: 03 89 ldd r16, Z+19 ; 0x13 - 5bc: 14 89 ldd r17, Z+20 ; 0x14 - 5be: 25 85 ldd r18, Z+13 ; 0x0d - 5c0: 36 85 ldd r19, Z+14 ; 0x0e - 5c2: 47 85 ldd r20, Z+15 ; 0x0f - 5c4: 50 89 ldd r21, Z+16 ; 0x10 - 5c6: 69 2d mov r22, r9 - 5c8: 8a 81 ldd r24, Y+2 ; 0x02 - 5ca: 9b 81 ldd r25, Y+3 ; 0x03 - 5cc: 3c d1 rcall .+632 ; 0x846 - 5ce: 81 e4 ldi r24, 0x41 ; 65 - 5d0: 93 e0 ldi r25, 0x03 ; 3 - 5d2: 01 97 sbiw r24, 0x01 ; 1 - 5d4: f1 f7 brne .-4 ; 0x5d2 - 5d6: 00 00 nop - _delay_ms(1); - cm_setCLKControl(inst->si5351_dev,output,SI5351_CLK_POWER_UP); - 5d8: 40 e0 ldi r20, 0x00 ; 0 - 5da: 69 2d mov r22, r9 - 5dc: 8a 81 ldd r24, Y+2 ; 0x02 - 5de: 9b 81 ldd r25, Y+3 ; 0x03 - 5e0: b8 d1 rcall .+880 ; 0x952 + 57c: 81 e4 ldi r24, 0x41 ; 65 + 57e: 93 e0 ldi r25, 0x03 ; 3 + 580: 01 97 sbiw r24, 0x01 ; 1 + 582: f1 f7 brne .-4 ; 0x580 + 584: 00 00 nop + //cqm_setPLLParam(inst, SI5351_PLL_A, SI5351_OUTPUT_0); + //cm_setCLKControl(inst->si5351_dev,SI5351_OUTPUT_0,SI5351_CLK_POWER_UP); + //_delay_ms(1); -} - 5e2: df 91 pop r29 - 5e4: cf 91 pop r28 - 5e6: 1f 91 pop r17 - 5e8: 0f 91 pop r16 - 5ea: ff 90 pop r15 - 5ec: ef 90 pop r14 - 5ee: df 90 pop r13 - 5f0: cf 90 pop r12 - 5f2: bf 90 pop r11 - 5f4: af 90 pop r10 - 5f6: 9f 90 pop r9 - 5f8: 08 95 ret - -000005fa : - -static void cqm6xx_app_loadPLLParam(storno_xtal_app_t *inst){ - 5fa: cf 93 push r28 - 5fc: df 93 push r29 - 5fe: ec 01 movw r28, r24 - - cm_setInputSource(inst->si5351_dev, SI5351_CLK_SOURCE_XTAL); - 600: 60 e0 ldi r22, 0x00 ; 0 - 602: 8a 81 ldd r24, Y+2 ; 0x02 - 604: 9b 81 ldd r25, Y+3 ; 0x03 - 606: d3 d1 rcall .+934 ; 0x9ae - 608: 81 e4 ldi r24, 0x41 ; 65 - 60a: 93 e0 ldi r25, 0x03 ; 3 - 60c: 01 97 sbiw r24, 0x01 ; 1 - 60e: f1 f7 brne .-4 ; 0x60c - 610: 00 00 nop - _delay_ms(1); - - inst->pll_param_ptr = &temp_msg; - 612: 88 e4 ldi r24, 0x48 ; 72 - 614: 9f e3 ldi r25, 0x3F ; 63 - 616: 8c 83 std Y+4, r24 ; 0x04 - 618: 9d 83 std Y+5, r25 ; 0x05 - cm_EEPROM_read(PLLA_SETTINGS_EEPROM_ADDR,msg_ptr,sizeof(storno_pll_param_msg)); - 61a: 60 91 06 3f lds r22, 0x3F06 ; 0x803f06 - 61e: 70 91 07 3f lds r23, 0x3F07 ; 0x803f07 - 622: 49 e1 ldi r20, 0x19 ; 25 - 624: 80 e0 ldi r24, 0x00 ; 0 - 626: 90 e0 ldi r25, 0x00 ; 0 - 628: 3f dd rcall .-1410 ; 0xa8 - - cqm_setPLLParam(inst, SI5351_PLL_A, SI5351_OUTPUT_0); - 62a: 40 e0 ldi r20, 0x00 ; 0 - 62c: 60 e0 ldi r22, 0x00 ; 0 - 62e: ce 01 movw r24, r28 - 630: 99 df rcall .-206 ; 0x564 - cm_setCLKControl(inst->si5351_dev,SI5351_OUTPUT_0,SI5351_CLK_POWER_UP); - 632: 40 e0 ldi r20, 0x00 ; 0 - 634: 60 e0 ldi r22, 0x00 ; 0 - 636: 8a 81 ldd r24, Y+2 ; 0x02 - 638: 9b 81 ldd r25, Y+3 ; 0x03 - 63a: 8b d1 rcall .+790 ; 0x952 - 63c: 81 e4 ldi r24, 0x41 ; 65 - 63e: 93 e0 ldi r25, 0x03 ; 3 - 640: 01 97 sbiw r24, 0x01 ; 1 - 642: f1 f7 brne .-4 ; 0x640 - 644: 00 00 nop + cm_EEPROM_read((uint8_t*)PLLB_SETTINGS_EEPROM_ADDR,(uint8_t *)&inst->pll_param_data,sizeof(storno_pll_param_msg)); + 586: 49 e1 ldi r20, 0x19 ; 25 + 588: be 01 movw r22, r28 + 58a: 80 e2 ldi r24, 0x20 ; 32 + 58c: 90 e0 ldi r25, 0x00 ; 0 + 58e: 8c dd rcall .-1256 ; 0xa8 //cm_setCLKControl(inst->si5351_dev,SI5351_OUTPUT_1,SI5351_CLK_POWER_UP); //inst->pll_param_ptr = NULL; } - 646: df 91 pop r29 - 648: cf 91 pop r28 - 64a: 08 95 ret + 590: df 91 pop r29 + 592: cf 91 pop r28 + 594: 08 95 ret -0000064c : +00000596 : if(inst == NULL)return 1; return 0; } static void cqm6xx_app_updateOsc(storno_xtal_app_t *inst){ - 64c: cf 93 push r28 - 64e: df 93 push r29 - 650: ec 01 movw r28, r24 + 596: cf 93 push r28 + 598: df 93 push r29 + 59a: ec 01 movw r28, r24 // Check Struct if(isStructValid(inst) != 0)return; - 652: 7b df rcall .-266 ; 0x54a - 654: 81 11 cpse r24, r1 - 656: 32 c0 rjmp .+100 ; 0x6bc + 59c: d6 df rcall .-84 ; 0x54a + 59e: 81 11 cpse r24, r1 + 5a0: 32 c0 rjmp .+100 ; 0x606 // We will only do this once, aka when transisioning from RX to TX and TX to RX.. if(inst->state_next == inst->state_now)return; - 658: 89 81 ldd r24, Y+1 ; 0x01 - 65a: 98 81 ld r25, Y - 65c: 89 17 cp r24, r25 - 65e: 71 f1 breq .+92 ; 0x6bc + 5a2: 89 81 ldd r24, Y+1 ; 0x01 + 5a4: 98 81 ld r25, Y + 5a6: 89 17 cp r24, r25 + 5a8: 71 f1 breq .+92 ; 0x606 switch(inst->state_next){ - 660: 81 30 cpi r24, 0x01 ; 1 - 662: 19 f0 breq .+6 ; 0x66a - 664: 82 30 cpi r24, 0x02 ; 2 - 666: b1 f0 breq .+44 ; 0x694 - 668: 29 c0 rjmp .+82 ; 0x6bc - 66a: 81 e4 ldi r24, 0x41 ; 65 - 66c: 93 e0 ldi r25, 0x03 ; 3 - 66e: 01 97 sbiw r24, 0x01 ; 1 - 670: f1 f7 brne .-4 ; 0x66e - 672: 00 00 nop + 5aa: 81 30 cpi r24, 0x01 ; 1 + 5ac: 19 f0 breq .+6 ; 0x5b4 + 5ae: 82 30 cpi r24, 0x02 ; 2 + 5b0: b1 f0 breq .+44 ; 0x5de + 5b2: 29 c0 rjmp .+82 ; 0x606 + 5b4: 81 e4 ldi r24, 0x41 ; 65 + 5b6: 93 e0 ldi r25, 0x03 ; 3 + 5b8: 01 97 sbiw r24, 0x01 ; 1 + 5ba: f1 f7 brne .-4 ; 0x5b8 + 5bc: 00 00 nop case STORNO_APP_RX_MODE: _delay_ms(1); cm_setOutputEnable(inst->si5351_dev,SI5351_OUTPUT_0,SI5351_OUTPUT_ENABLE); // RX - 674: 40 e0 ldi r20, 0x00 ; 0 - 676: 60 e0 ldi r22, 0x00 ; 0 - 678: 8a 81 ldd r24, Y+2 ; 0x02 - 67a: 9b 81 ldd r25, Y+3 ; 0x03 - 67c: 4a d1 rcall .+660 ; 0x912 - 67e: 81 e4 ldi r24, 0x41 ; 65 - 680: 93 e0 ldi r25, 0x03 ; 3 - 682: 01 97 sbiw r24, 0x01 ; 1 - 684: f1 f7 brne .-4 ; 0x682 - 686: 00 00 nop + 5be: 40 e0 ldi r20, 0x00 ; 0 + 5c0: 60 e0 ldi r22, 0x00 ; 0 + 5c2: 8a 81 ldd r24, Y+2 ; 0x02 + 5c4: 9b 81 ldd r25, Y+3 ; 0x03 + 5c6: ec d0 rcall .+472 ; 0x7a0 + 5c8: 81 e4 ldi r24, 0x41 ; 65 + 5ca: 93 e0 ldi r25, 0x03 ; 3 + 5cc: 01 97 sbiw r24, 0x01 ; 1 + 5ce: f1 f7 brne .-4 ; 0x5cc + 5d0: 00 00 nop _delay_ms(1); cm_setOutputEnable(inst->si5351_dev,SI5351_OUTPUT_1,SI5351_OUTPUT_DISABLE); // TX - 688: 41 e0 ldi r20, 0x01 ; 1 - 68a: 61 e0 ldi r22, 0x01 ; 1 - 68c: 8a 81 ldd r24, Y+2 ; 0x02 - 68e: 9b 81 ldd r25, Y+3 ; 0x03 - 690: 40 d1 rcall .+640 ; 0x912 + 5d2: 41 e0 ldi r20, 0x01 ; 1 + 5d4: 61 e0 ldi r22, 0x01 ; 1 + 5d6: 8a 81 ldd r24, Y+2 ; 0x02 + 5d8: 9b 81 ldd r25, Y+3 ; 0x03 + 5da: e2 d0 rcall .+452 ; 0x7a0 break; - 692: 14 c0 rjmp .+40 ; 0x6bc - 694: 81 e4 ldi r24, 0x41 ; 65 - 696: 93 e0 ldi r25, 0x03 ; 3 - 698: 01 97 sbiw r24, 0x01 ; 1 - 69a: f1 f7 brne .-4 ; 0x698 - 69c: 00 00 nop + 5dc: 14 c0 rjmp .+40 ; 0x606 + 5de: 81 e4 ldi r24, 0x41 ; 65 + 5e0: 93 e0 ldi r25, 0x03 ; 3 + 5e2: 01 97 sbiw r24, 0x01 ; 1 + 5e4: f1 f7 brne .-4 ; 0x5e2 + 5e6: 00 00 nop case STORNO_APP_TX_MODE: _delay_ms(1); cm_setOutputEnable(inst->si5351_dev,SI5351_OUTPUT_0,SI5351_OUTPUT_DISABLE); // RX - 69e: 41 e0 ldi r20, 0x01 ; 1 - 6a0: 60 e0 ldi r22, 0x00 ; 0 - 6a2: 8a 81 ldd r24, Y+2 ; 0x02 - 6a4: 9b 81 ldd r25, Y+3 ; 0x03 - 6a6: 35 d1 rcall .+618 ; 0x912 - 6a8: 81 e4 ldi r24, 0x41 ; 65 - 6aa: 93 e0 ldi r25, 0x03 ; 3 - 6ac: 01 97 sbiw r24, 0x01 ; 1 - 6ae: f1 f7 brne .-4 ; 0x6ac - 6b0: 00 00 nop + 5e8: 41 e0 ldi r20, 0x01 ; 1 + 5ea: 60 e0 ldi r22, 0x00 ; 0 + 5ec: 8a 81 ldd r24, Y+2 ; 0x02 + 5ee: 9b 81 ldd r25, Y+3 ; 0x03 + 5f0: d7 d0 rcall .+430 ; 0x7a0 + 5f2: 81 e4 ldi r24, 0x41 ; 65 + 5f4: 93 e0 ldi r25, 0x03 ; 3 + 5f6: 01 97 sbiw r24, 0x01 ; 1 + 5f8: f1 f7 brne .-4 ; 0x5f6 + 5fa: 00 00 nop _delay_ms(1); cm_setOutputEnable(inst->si5351_dev,SI5351_OUTPUT_1,SI5351_OUTPUT_ENABLE); // TX - 6b2: 40 e0 ldi r20, 0x00 ; 0 - 6b4: 61 e0 ldi r22, 0x01 ; 1 - 6b6: 8a 81 ldd r24, Y+2 ; 0x02 - 6b8: 9b 81 ldd r25, Y+3 ; 0x03 - 6ba: 2b d1 rcall .+598 ; 0x912 + 5fc: 40 e0 ldi r20, 0x00 ; 0 + 5fe: 61 e0 ldi r22, 0x01 ; 1 + 600: 8a 81 ldd r24, Y+2 ; 0x02 + 602: 9b 81 ldd r25, Y+3 ; 0x03 + 604: cd d0 rcall .+410 ; 0x7a0 break; } } - 6bc: df 91 pop r29 - 6be: cf 91 pop r28 - 6c0: 08 95 ret + 606: df 91 pop r29 + 608: cf 91 pop r28 + 60a: 08 95 ret -000006c2 : +0000060c : //inst->pll_param_ptr = NULL; } void cqm6xx_app_statemachine(storno_xtal_app_t *inst){ - 6c2: cf 93 push r28 - 6c4: df 93 push r29 - 6c6: ec 01 movw r28, r24 + 60c: cf 93 push r28 + 60e: df 93 push r29 + 610: ec 01 movw r28, r24 // Check Struct if(isStructValid(inst) != 0)return; - 6c8: 40 df rcall .-384 ; 0x54a - 6ca: 81 11 cpse r24, r1 - 6cc: 24 c0 rjmp .+72 ; 0x716 + 612: 9b df rcall .-202 ; 0x54a + 614: 81 11 cpse r24, r1 + 616: 24 c0 rjmp .+72 ; 0x660 switch (inst->state_next) - 6ce: 89 81 ldd r24, Y+1 ; 0x01 - 6d0: 81 30 cpi r24, 0x01 ; 1 - 6d2: 51 f0 breq .+20 ; 0x6e8 - 6d4: 18 f0 brcs .+6 ; 0x6dc - 6d6: 82 30 cpi r24, 0x02 ; 2 - 6d8: 99 f0 breq .+38 ; 0x700 - 6da: 1d c0 rjmp .+58 ; 0x716 + 618: 89 81 ldd r24, Y+1 ; 0x01 + 61a: 81 30 cpi r24, 0x01 ; 1 + 61c: 51 f0 breq .+20 ; 0x632 + 61e: 18 f0 brcs .+6 ; 0x626 + 620: 82 30 cpi r24, 0x02 ; 2 + 622: 99 f0 breq .+38 ; 0x64a + 624: 1d c0 rjmp .+58 ; 0x660 { case STORNO_APP_PROGRAM_OSC: // Read PLL parameters from EEPROM and Program PLL values here: inst->state_now = inst->state_next; - 6dc: 88 83 st Y, r24 + 626: 88 83 st Y, r24 cqm6xx_app_loadPLLParam(inst); - 6de: ce 01 movw r24, r28 - 6e0: 8c df rcall .-232 ; 0x5fa + 628: ce 01 movw r24, r28 + 62a: 9c df rcall .-200 ; 0x564 // if ok, then go to RX mode: inst->state_next = STORNO_APP_RX_MODE; - 6e2: 81 e0 ldi r24, 0x01 ; 1 - 6e4: 89 83 std Y+1, r24 ; 0x01 + 62c: 81 e0 ldi r24, 0x01 ; 1 + 62e: 89 83 std Y+1, r24 ; 0x01 break; - 6e6: 17 c0 rjmp .+46 ; 0x716 + 630: 17 c0 rjmp .+46 ; 0x660 case STORNO_APP_RX_MODE: // If we just came from another state, then Enable RX osc here.. cqm6xx_app_updateOsc(inst); - 6e8: ce 01 movw r24, r28 - 6ea: b0 df rcall .-160 ; 0x64c + 632: ce 01 movw r24, r28 + 634: b0 df rcall .-160 ; 0x596 // Update state now.. inst->state_now = inst->state_next; - 6ec: 89 81 ldd r24, Y+1 ; 0x01 - 6ee: 88 83 st Y, r24 + 636: 89 81 ldd r24, Y+1 ; 0x01 + 638: 88 83 st Y, r24 // If PTT is hold, then disable RX osc, and go to STORNO_APP_TX_MODE, to enable tx osc. if(gpio_get_level(GPIO_PORTA,GPIO_PIN_PTT) == GPIO_LEVEL_SET) inst->state_next = STORNO_APP_TX_MODE; - 6f0: 63 e0 ldi r22, 0x03 ; 3 - 6f2: 80 e0 ldi r24, 0x00 ; 0 - 6f4: fc dc rcall .-1544 ; 0xee - 6f6: 01 97 sbiw r24, 0x01 ; 1 - 6f8: 71 f4 brne .+28 ; 0x716 - 6fa: 82 e0 ldi r24, 0x02 ; 2 - 6fc: 89 83 std Y+1, r24 ; 0x01 - 6fe: 0b c0 rjmp .+22 ; 0x716 + 63a: 63 e0 ldi r22, 0x03 ; 3 + 63c: 80 e0 ldi r24, 0x00 ; 0 + 63e: 57 dd rcall .-1362 ; 0xee + 640: 01 97 sbiw r24, 0x01 ; 1 + 642: 71 f4 brne .+28 ; 0x660 + 644: 82 e0 ldi r24, 0x02 ; 2 + 646: 89 83 std Y+1, r24 ; 0x01 + 648: 0b c0 rjmp .+22 ; 0x660 break; case STORNO_APP_TX_MODE: // If we just came from another state, then Enable TX osc here.. cqm6xx_app_updateOsc(inst); - 700: ce 01 movw r24, r28 - 702: a4 df rcall .-184 ; 0x64c + 64a: ce 01 movw r24, r28 + 64c: a4 df rcall .-184 ; 0x596 // Update state now.. inst->state_now = inst->state_next; - 704: 89 81 ldd r24, Y+1 ; 0x01 - 706: 88 83 st Y, r24 + 64e: 89 81 ldd r24, Y+1 ; 0x01 + 650: 88 83 st Y, r24 // If PTT is released, then disable TX osc, and go to STORNO_APP_RX_MODE, to enable rx osc. if(gpio_get_level(GPIO_PORTA,GPIO_PIN_PTT) == GPIO_LEVEL_RESET) inst->state_next = STORNO_APP_RX_MODE; - 708: 63 e0 ldi r22, 0x03 ; 3 - 70a: 80 e0 ldi r24, 0x00 ; 0 - 70c: f0 dc rcall .-1568 ; 0xee - 70e: 89 2b or r24, r25 - 710: 11 f4 brne .+4 ; 0x716 - 712: 81 e0 ldi r24, 0x01 ; 1 - 714: 89 83 std Y+1, r24 ; 0x01 + 652: 63 e0 ldi r22, 0x03 ; 3 + 654: 80 e0 ldi r24, 0x00 ; 0 + 656: 4b dd rcall .-1386 ; 0xee + 658: 89 2b or r24, r25 + 65a: 11 f4 brne .+4 ; 0x660 + 65c: 81 e0 ldi r24, 0x01 ; 1 + 65e: 89 83 std Y+1, r24 ; 0x01 default: break; } } - 716: df 91 pop r29 - 718: cf 91 pop r28 - 71a: 08 95 ret + 660: df 91 pop r29 + 662: cf 91 pop r28 + 664: 08 95 ret -0000071c : +00000666 : void programPLL_Parameters(storno_xtal_app_t *inst){ //Burn settings into eeprom here: - switch(inst->pll_param_ptr->PLL_Ident){ - 71c: fc 01 movw r30, r24 - 71e: 64 81 ldd r22, Z+4 ; 0x04 - 720: 75 81 ldd r23, Z+5 ; 0x05 - 722: fb 01 movw r30, r22 - 724: 80 81 ld r24, Z - 726: 88 23 and r24, r24 - 728: 19 f0 breq .+6 ; 0x730 - 72a: 81 30 cpi r24, 0x01 ; 1 - 72c: 31 f0 breq .+12 ; 0x73a - 72e: 08 95 ret + switch(inst->pll_param_data.PLL_Ident){ + 666: fc 01 movw r30, r24 + 668: 24 81 ldd r18, Z+4 ; 0x04 + 66a: 22 23 and r18, r18 + 66c: 19 f0 breq .+6 ; 0x674 + 66e: 21 30 cpi r18, 0x01 ; 1 + 670: 49 f0 breq .+18 ; 0x684 + 672: 08 95 ret case MSG_PLLA_PARAM: - cm_EEPROM_write(PLLA_SETTINGS_EEPROM_ADDR,(uint8_t*)(inst->pll_param_ptr), sizeof(storno_pll_param_msg)); - 730: 49 e1 ldi r20, 0x19 ; 25 - 732: 80 e0 ldi r24, 0x00 ; 0 - 734: 90 e0 ldi r25, 0x00 ; 0 - 736: 9a dc rcall .-1740 ; 0x6c + cm_EEPROM_write((uint8_t*)PLLB_SETTINGS_EEPROM_ADDR,(uint8_t*)&(inst->pll_param_data), sizeof(storno_pll_param_msg)); + 674: bc 01 movw r22, r24 + 676: 6c 5f subi r22, 0xFC ; 252 + 678: 7f 4f sbci r23, 0xFF ; 255 + 67a: 49 e1 ldi r20, 0x19 ; 25 + 67c: 80 e2 ldi r24, 0x20 ; 32 + 67e: 90 e0 ldi r25, 0x00 ; 0 + 680: f5 dc rcall .-1558 ; 0x6c break; - 738: 08 95 ret + 682: 08 95 ret case MSG_PLLB_PARAM: - cm_EEPROM_write(PLLB_SETTINGS_EEPROM_ADDR,(uint8_t*)(inst->pll_param_ptr), sizeof(storno_pll_param_msg)); - 73a: 49 e1 ldi r20, 0x19 ; 25 - 73c: 80 e2 ldi r24, 0x20 ; 32 - 73e: 90 e0 ldi r25, 0x00 ; 0 - 740: 95 dc rcall .-1750 ; 0x6c - 742: 08 95 ret + cm_EEPROM_write((uint8_t*)PLLB_SETTINGS_EEPROM_ADDR,(uint8_t*)&(inst->pll_param_data), sizeof(storno_pll_param_msg)); + 684: bc 01 movw r22, r24 + 686: 6c 5f subi r22, 0xFC ; 252 + 688: 7f 4f sbci r23, 0xFF ; 255 + 68a: 49 e1 ldi r20, 0x19 ; 25 + 68c: 80 e2 ldi r24, 0x20 ; 32 + 68e: 90 e0 ldi r25, 0x00 ; 0 + 690: ed dc rcall .-1574 ; 0x6c + 692: 08 95 ret -00000744 : - +00000694 : } int uart_rx_event(storno_xtal_app_t *inst, void *rxData){ - inst->pll_param_ptr = rxData; - 744: fc 01 movw r30, r24 - 746: 64 83 std Z+4, r22 ; 0x04 - 748: 75 83 std Z+5, r23 ; 0x05 + memcpy(&inst->pll_param_data,rxData,sizeof(storno_pll_param_msg)); + 694: dc 01 movw r26, r24 + 696: 14 96 adiw r26, 0x04 ; 4 + 698: 29 e1 ldi r18, 0x19 ; 25 + 69a: fb 01 movw r30, r22 + 69c: 01 90 ld r0, Z+ + 69e: 0d 92 st X+, r0 + 6a0: 2a 95 dec r18 + 6a2: e1 f7 brne .-8 ; 0x69c + programPLL_Parameters(inst); - 74a: e8 df rcall .-48 ; 0x71c + 6a4: e0 df rcall .-64 ; 0x666 return 0; } - 74c: 80 e0 ldi r24, 0x00 ; 0 - 74e: 90 e0 ldi r25, 0x00 ; 0 - 750: 08 95 ret + 6a6: 80 e0 ldi r24, 0x00 ; 0 + 6a8: 90 e0 ldi r25, 0x00 ; 0 + 6aa: 08 95 ret -00000752 : +000006ac : void cqm6xx_app_init(storno_xtal_app_t *inst, void *si5351_dev){ - 752: cf 93 push r28 - 754: df 93 push r29 + 6ac: cf 93 push r28 + 6ae: df 93 push r29 if(si5351_dev == NULL) return; - 756: 61 15 cp r22, r1 - 758: 71 05 cpc r23, r1 - 75a: 71 f0 breq .+28 ; 0x778 + 6b0: 61 15 cp r22, r1 + 6b2: 71 05 cpc r23, r1 + 6b4: 71 f0 breq .+28 ; 0x6d2 if(inst == NULL)return; - 75c: 00 97 sbiw r24, 0x00 ; 0 - 75e: 61 f0 breq .+24 ; 0x778 - 760: ec 01 movw r28, r24 + 6b6: 00 97 sbiw r24, 0x00 ; 0 + 6b8: 61 f0 breq .+24 ; 0x6d2 + 6ba: ec 01 movw r28, r24 inst->state_next = STORNO_APP_PROGRAM_OSC; - 762: 19 82 std Y+1, r1 ; 0x01 + 6bc: 19 82 std Y+1, r1 ; 0x01 inst->state_now = STORNO_APP_PROGRAM_OSC; - 764: 18 82 st Y, r1 + 6be: 18 82 st Y, r1 inst->si5351_dev = si5351_dev; - 766: 6a 83 std Y+2, r22 ; 0x02 - 768: 7b 83 std Y+3, r23 ; 0x03 + 6c0: 6a 83 std Y+2, r22 ; 0x02 + 6c2: 7b 83 std Y+3, r23 ; 0x03 //cm_uart_init(inst,(get_UART_Event_fpt)uart_rx_event); cm_MsgCompleteEvt_Register(inst,(Get_msgComplete_Event_fpt)uart_rx_event); - 76a: 62 ea ldi r22, 0xA2 ; 162 - 76c: 73 e0 ldi r23, 0x03 ; 3 - 76e: df de rcall .-578 ; 0x52e + 6c4: 6a e4 ldi r22, 0x4A ; 74 + 6c6: 73 e0 ldi r23, 0x03 ; 3 + 6c8: 32 df rcall .-412 ; 0x52e cm_uart_init(inst,(get_UART_Event_fpt)cm_msg_DecodeMsg_Byte); - 770: 63 e4 ldi r22, 0x43 ; 67 - 772: 72 e0 ldi r23, 0x02 ; 2 - 774: ce 01 movw r24, r28 - 776: 08 de rcall .-1008 ; 0x388 + 6ca: 63 e4 ldi r22, 0x43 ; 67 + 6cc: 72 e0 ldi r23, 0x02 ; 2 + 6ce: ce 01 movw r24, r28 + 6d0: 5b de rcall .-842 ; 0x388 - 778: df 91 pop r29 - 77a: cf 91 pop r28 - 77c: 08 95 ret + 6d2: df 91 pop r29 + 6d4: cf 91 pop r28 + 6d6: 08 95 ret -0000077e
: +000006d8
: uint8_t data_set[25] = {0x55,56}; //cm_EEPROM_write(0x00,data_set,1); uint8_t data[25] = {0}; int main(void) { - 77e: cf 93 push r28 - 780: df 93 push r29 - 782: cd b7 in r28, 0x3d ; 61 - 784: de b7 in r29, 0x3e ; 62 - 786: cb 55 subi r28, 0x5B ; 91 - 788: d1 09 sbc r29, r1 - 78a: cd bf out 0x3d, r28 ; 61 - 78c: de bf out 0x3e, r29 ; 62 + 6d8: cf 93 push r28 + 6da: df 93 push r29 + 6dc: cd b7 in r28, 0x3d ; 61 + 6de: de b7 in r29, 0x3e ; 62 + 6e0: cb 55 subi r28, 0x5B ; 91 + 6e2: d1 09 sbc r29, r1 + 6e4: cd bf out 0x3d, r28 ; 61 + 6e6: de bf out 0x3e, r29 ; 62 /* Replace with your application code */ // Init Periphials cm_i2c_init(NULL); - 78e: 80 e0 ldi r24, 0x00 ; 0 - 790: 90 e0 ldi r25, 0x00 ; 0 - 792: 7d dd rcall .-1286 ; 0x28e + 6e8: 80 e0 ldi r24, 0x00 ; 0 + 6ea: 90 e0 ldi r25, 0x00 ; 0 + 6ec: d0 dd rcall .-1120 ; 0x28e // Add devices cm_i2c_device_t si5351_i2c; cm_i2c_addDev(&si5351_i2c,NULL,0x60); - 794: 40 e6 ldi r20, 0x60 ; 96 - 796: 60 e0 ldi r22, 0x00 ; 0 - 798: 70 e0 ldi r23, 0x00 ; 0 - 79a: ce 01 movw r24, r28 - 79c: 01 96 adiw r24, 0x01 ; 1 - 79e: 91 dd rcall .-1246 ; 0x2c2 + 6ee: 40 e6 ldi r20, 0x60 ; 96 + 6f0: 60 e0 ldi r22, 0x00 ; 0 + 6f2: 70 e0 ldi r23, 0x00 ; 0 + 6f4: ce 01 movw r24, r28 + 6f6: 01 96 adiw r24, 0x01 ; 1 + 6f8: e4 dd rcall .-1080 ; 0x2c2 // Init Devices: si5351_driver si5351_dev; cm_si5351_init(&si5351_dev,&si5351_i2c,(setGet_I2C_Event_fpt)cm_i2c_transfer); - 7a0: 4f e7 ldi r20, 0x7F ; 127 - 7a2: 51 e0 ldi r21, 0x01 ; 1 - 7a4: be 01 movw r22, r28 - 7a6: 6f 5f subi r22, 0xFF ; 255 - 7a8: 7f 4f sbci r23, 0xFF ; 255 - 7aa: ce 01 movw r24, r28 - 7ac: 04 96 adiw r24, 0x04 ; 4 - 7ae: a0 d1 rcall .+832 ; 0xaf0 + 6fa: 4f e7 ldi r20, 0x7F ; 127 + 6fc: 51 e0 ldi r21, 0x01 ; 1 + 6fe: be 01 movw r22, r28 + 700: 6f 5f subi r22, 0xFF ; 255 + 702: 7f 4f sbci r23, 0xFF ; 255 + 704: ce 01 movw r24, r28 + 706: 04 96 adiw r24, 0x04 ; 4 + 708: 6b d0 rcall .+214 ; 0x7e0 cqm6xx_app_init(&storno_xtal_app, &si5351_dev); - 7b0: be 01 movw r22, r28 - 7b2: 6c 5f subi r22, 0xFC ; 252 - 7b4: 7f 4f sbci r23, 0xFF ; 255 - 7b6: 81 e6 ldi r24, 0x61 ; 97 - 7b8: 9f e3 ldi r25, 0x3F ; 63 - 7ba: cb df rcall .-106 ; 0x752 + 70a: be 01 movw r22, r28 + 70c: 6c 5f subi r22, 0xFC ; 252 + 70e: 7f 4f sbci r23, 0xFF ; 255 + 710: 87 e4 ldi r24, 0x47 ; 71 + 712: 9f e3 ldi r25, 0x3F ; 63 + 714: cb df rcall .-106 ; 0x6ac while (1) { cqm6xx_app_statemachine(&storno_xtal_app); - 7bc: 81 e6 ldi r24, 0x61 ; 97 - 7be: 9f e3 ldi r25, 0x3F ; 63 - 7c0: 80 df rcall .-256 ; 0x6c2 - 7c2: 2a e6 ldi r18, 0x6A ; 106 - 7c4: 84 e0 ldi r24, 0x04 ; 4 - 7c6: 91 e0 ldi r25, 0x01 ; 1 - 7c8: 21 50 subi r18, 0x01 ; 1 - 7ca: 80 40 sbci r24, 0x00 ; 0 - 7cc: 90 40 sbci r25, 0x00 ; 0 - 7ce: e1 f7 brne .-8 ; 0x7c8 - 7d0: 00 c0 rjmp .+0 ; 0x7d2 - 7d2: f4 cf rjmp .-24 ; 0x7bc + 716: 87 e4 ldi r24, 0x47 ; 71 + 718: 9f e3 ldi r25, 0x3F ; 63 + 71a: 78 df rcall .-272 ; 0x60c + 71c: 2a e6 ldi r18, 0x6A ; 106 + 71e: 84 e0 ldi r24, 0x04 ; 4 + 720: 91 e0 ldi r25, 0x01 ; 1 + 722: 21 50 subi r18, 0x01 ; 1 + 724: 80 40 sbci r24, 0x00 ; 0 + 726: 90 40 sbci r25, 0x00 ; 0 + 728: e1 f7 brne .-8 ; 0x722 + 72a: 00 c0 rjmp .+0 ; 0x72c + 72c: f4 cf rjmp .-24 ; 0x716 -000007d4 : +0000072e : + 72e: 8f 92 push r8 + 730: 9f 92 push r9 + 732: af 92 push r10 + 734: bf 92 push r11 + 736: cf 92 push r12 + 738: df 92 push r13 + 73a: ef 92 push r14 + 73c: ff 92 push r15 + 73e: 0f 93 push r16 + 740: 1f 93 push r17 + 742: cf 93 push r28 + 744: df 93 push r29 + 746: ec 01 movw r28, r24 + 748: 86 2e mov r8, r22 + 74a: 5a 01 movw r10, r20 + 74c: 68 01 movw r12, r16 + 74e: 79 01 movw r14, r18 + 750: c8 01 movw r24, r16 + 752: 01 96 adiw r24, 0x01 ; 1 + 754: e6 d0 rcall .+460 ; 0x922 + 756: 98 2e mov r9, r24 + 758: 19 2f mov r17, r25 + 75a: fc 01 movw r30, r24 + 75c: 81 92 st Z+, r8 + 75e: cf 01 movw r24, r30 + 760: a6 01 movw r20, r12 + 762: b5 01 movw r22, r10 + 764: ff d1 rcall .+1022 ; 0xb64 + 766: ea 81 ldd r30, Y+2 ; 0x02 + 768: fb 81 ldd r31, Y+3 ; 0x03 + 76a: a7 01 movw r20, r14 + 76c: 96 01 movw r18, r12 + 76e: 2f 5f subi r18, 0xFF ; 255 + 770: 3f 4f sbci r19, 0xFF ; 255 + 772: 4f 4f sbci r20, 0xFF ; 255 + 774: 5f 4f sbci r21, 0xFF ; 255 + 776: 01 e0 ldi r16, 0x01 ; 1 + 778: 69 2d mov r22, r9 + 77a: 71 2f mov r23, r17 + 77c: 88 81 ld r24, Y + 77e: 99 81 ldd r25, Y+1 ; 0x01 + 780: 09 95 icall + 782: 80 e0 ldi r24, 0x00 ; 0 + 784: 90 e0 ldi r25, 0x00 ; 0 + 786: df 91 pop r29 + 788: cf 91 pop r28 + 78a: 1f 91 pop r17 + 78c: 0f 91 pop r16 + 78e: ff 90 pop r15 + 790: ef 90 pop r14 + 792: df 90 pop r13 + 794: cf 90 pop r12 + 796: bf 90 pop r11 + 798: af 90 pop r10 + 79a: 9f 90 pop r9 + 79c: 8f 90 pop r8 + 79e: 08 95 ret - // Read Device Status register: - readRegister(inst,0x00, (uint8_t *) &inst->device_data.deviceStatus, sizeof(si5351_deviceStat_t)); +000007a0 : + 7a0: 0f 93 push r16 + 7a2: 1f 93 push r17 + 7a4: 66 23 and r22, r22 + 7a6: 19 f0 breq .+6 ; 0x7ae + 7a8: 61 30 cpi r22, 0x01 ; 1 + 7aa: 39 f0 breq .+14 ; 0x7ba + 7ac: 0b c0 rjmp .+22 ; 0x7c4 + 7ae: fc 01 movw r30, r24 + 7b0: 27 81 ldd r18, Z+7 ; 0x07 + 7b2: 40 fb bst r20, 0 + 7b4: 20 f9 bld r18, 0 + 7b6: 27 83 std Z+7, r18 ; 0x07 + 7b8: 05 c0 rjmp .+10 ; 0x7c4 + 7ba: fc 01 movw r30, r24 + 7bc: 27 81 ldd r18, Z+7 ; 0x07 + 7be: 40 fb bst r20, 0 + 7c0: 21 f9 bld r18, 1 + 7c2: 27 83 std Z+7, r18 ; 0x07 + 7c4: ac 01 movw r20, r24 + 7c6: 49 5f subi r20, 0xF9 ; 249 + 7c8: 5f 4f sbci r21, 0xFF ; 255 + 7ca: 01 e0 ldi r16, 0x01 ; 1 + 7cc: 10 e0 ldi r17, 0x00 ; 0 + 7ce: 20 e0 ldi r18, 0x00 ; 0 + 7d0: 30 e0 ldi r19, 0x00 ; 0 + 7d2: 63 e0 ldi r22, 0x03 ; 3 + 7d4: ac df rcall .-168 ; 0x72e + 7d6: 80 e0 ldi r24, 0x00 ; 0 + 7d8: 90 e0 ldi r25, 0x00 ; 0 + 7da: 1f 91 pop r17 + 7dc: 0f 91 pop r16 + 7de: 08 95 ret - return inst->device_data.deviceStatus.REVID; -} - 7d4: 8f 92 push r8 - 7d6: 9f 92 push r9 - 7d8: af 92 push r10 - 7da: bf 92 push r11 - 7dc: cf 92 push r12 - 7de: df 92 push r13 +000007e0 : 7e0: ef 92 push r14 7e2: ff 92 push r15 7e4: 0f 93 push r16 7e6: 1f 93 push r17 7e8: cf 93 push r28 7ea: df 93 push r29 - 7ec: ec 01 movw r28, r24 - 7ee: 86 2e mov r8, r22 - 7f0: 5a 01 movw r10, r20 - 7f2: 68 01 movw r12, r16 - 7f4: 79 01 movw r14, r18 - 7f6: c8 01 movw r24, r16 - 7f8: 01 96 adiw r24, 0x01 ; 1 - 7fa: 1b d2 rcall .+1078 ; 0xc32 - 7fc: 98 2e mov r9, r24 - 7fe: 19 2f mov r17, r25 - 800: fc 01 movw r30, r24 - 802: 81 92 st Z+, r8 - 804: cf 01 movw r24, r30 - 806: a6 01 movw r20, r12 - 808: b5 01 movw r22, r10 - 80a: 34 d3 rcall .+1640 ; 0xe74 - 80c: ea 81 ldd r30, Y+2 ; 0x02 - 80e: fb 81 ldd r31, Y+3 ; 0x03 - 810: a7 01 movw r20, r14 - 812: 96 01 movw r18, r12 - 814: 2f 5f subi r18, 0xFF ; 255 - 816: 3f 4f sbci r19, 0xFF ; 255 - 818: 4f 4f sbci r20, 0xFF ; 255 - 81a: 5f 4f sbci r21, 0xFF ; 255 - 81c: 01 e0 ldi r16, 0x01 ; 1 - 81e: 69 2d mov r22, r9 - 820: 71 2f mov r23, r17 - 822: 88 81 ld r24, Y - 824: 99 81 ldd r25, Y+1 ; 0x01 - 826: 09 95 icall - 828: 80 e0 ldi r24, 0x00 ; 0 - 82a: 90 e0 ldi r25, 0x00 ; 0 - 82c: df 91 pop r29 - 82e: cf 91 pop r28 - 830: 1f 91 pop r17 - 832: 0f 91 pop r16 - 834: ff 90 pop r15 - 836: ef 90 pop r14 - 838: df 90 pop r13 - 83a: cf 90 pop r12 - 83c: bf 90 pop r11 - 83e: af 90 pop r10 - 840: 9f 90 pop r9 - 842: 8f 90 pop r8 - 844: 08 95 ret - -00000846 : - 846: af 92 push r10 - 848: bf 92 push r11 - 84a: cf 92 push r12 - 84c: df 92 push r13 - 84e: ef 92 push r14 - 850: ff 92 push r15 - 852: 0f 93 push r16 - 854: 1f 93 push r17 - 856: fc 01 movw r30, r24 - 858: 66 23 and r22, r22 - 85a: 19 f0 breq .+6 ; 0x862 - 85c: 61 30 cpi r22, 0x01 ; 1 - 85e: 41 f1 breq .+80 ; 0x8b0 - 860: 4d c0 rjmp .+154 ; 0x8fc - 862: 43 70 andi r20, 0x03 ; 3 - 864: 86 a1 ldd r24, Z+38 ; 0x26 - 866: 8c 7f andi r24, 0xFC ; 252 - 868: 48 2b or r20, r24 - 86a: 46 a3 std Z+38, r20 ; 0x26 - 86c: 37 a3 std Z+39, r19 ; 0x27 - 86e: 20 a7 std Z+40, r18 ; 0x28 - 870: f2 a6 std Z+42, r15 ; 0x2a - 872: e3 a6 std Z+43, r14 ; 0x2b - 874: d6 01 movw r26, r12 - 876: c5 01 movw r24, r10 - 878: 07 2e mov r0, r23 - 87a: 7c e0 ldi r23, 0x0C ; 12 - 87c: b6 95 lsr r27 - 87e: a7 95 ror r26 - 880: 97 95 ror r25 - 882: 87 95 ror r24 - 884: 7a 95 dec r23 - 886: d1 f7 brne .-12 ; 0x87c - 888: 70 2d mov r23, r0 - 88a: 83 70 andi r24, 0x03 ; 3 - 88c: 82 95 swap r24 - 88e: 80 7f andi r24, 0xF0 ; 240 - 890: 03 70 andi r16, 0x03 ; 3 - 892: 80 2b or r24, r16 - 894: 81 a7 std Z+41, r24 ; 0x29 - 896: b4 a2 std Z+36, r11 ; 0x24 - 898: a5 a2 std Z+37, r10 ; 0x25 - 89a: af 01 movw r20, r30 - 89c: 4c 5d subi r20, 0xDC ; 220 - 89e: 5f 4f sbci r21, 0xFF ; 255 - 8a0: 08 e0 ldi r16, 0x08 ; 8 - 8a2: 10 e0 ldi r17, 0x00 ; 0 - 8a4: 20 e0 ldi r18, 0x00 ; 0 - 8a6: 30 e0 ldi r19, 0x00 ; 0 - 8a8: 6a e2 ldi r22, 0x2A ; 42 - 8aa: cf 01 movw r24, r30 - 8ac: 93 df rcall .-218 ; 0x7d4 - 8ae: 26 c0 rjmp .+76 ; 0x8fc - 8b0: 43 70 andi r20, 0x03 ; 3 - 8b2: 86 a5 ldd r24, Z+46 ; 0x2e - 8b4: 8c 7f andi r24, 0xFC ; 252 - 8b6: 48 2b or r20, r24 - 8b8: 46 a7 std Z+46, r20 ; 0x2e - 8ba: 37 a7 std Z+47, r19 ; 0x2f - 8bc: 20 ab std Z+48, r18 ; 0x30 - 8be: f2 aa std Z+50, r15 ; 0x32 - 8c0: e3 aa std Z+51, r14 ; 0x33 - 8c2: d6 01 movw r26, r12 - 8c4: c5 01 movw r24, r10 - 8c6: 07 2e mov r0, r23 - 8c8: 7c e0 ldi r23, 0x0C ; 12 - 8ca: b6 95 lsr r27 - 8cc: a7 95 ror r26 - 8ce: 97 95 ror r25 - 8d0: 87 95 ror r24 - 8d2: 7a 95 dec r23 - 8d4: d1 f7 brne .-12 ; 0x8ca - 8d6: 70 2d mov r23, r0 - 8d8: 83 70 andi r24, 0x03 ; 3 - 8da: 82 95 swap r24 - 8dc: 80 7f andi r24, 0xF0 ; 240 - 8de: 03 70 andi r16, 0x03 ; 3 - 8e0: 80 2b or r24, r16 - 8e2: 81 ab std Z+49, r24 ; 0x31 - 8e4: b4 a6 std Z+44, r11 ; 0x2c - 8e6: a5 a6 std Z+45, r10 ; 0x2d - 8e8: af 01 movw r20, r30 - 8ea: 44 5d subi r20, 0xD4 ; 212 - 8ec: 5f 4f sbci r21, 0xFF ; 255 - 8ee: 08 e0 ldi r16, 0x08 ; 8 - 8f0: 10 e0 ldi r17, 0x00 ; 0 - 8f2: 20 e0 ldi r18, 0x00 ; 0 - 8f4: 30 e0 ldi r19, 0x00 ; 0 - 8f6: 62 e3 ldi r22, 0x32 ; 50 - 8f8: cf 01 movw r24, r30 - 8fa: 6c df rcall .-296 ; 0x7d4 + 7ec: 1f 92 push r1 + 7ee: cd b7 in r28, 0x3d ; 61 + 7f0: de b7 in r29, 0x3e ; 62 + 7f2: 00 97 sbiw r24, 0x00 ; 0 + 7f4: 09 f4 brne .+2 ; 0x7f8 + 7f6: 85 c0 rjmp .+266 ; 0x902 + 7f8: 61 15 cp r22, r1 + 7fa: 71 05 cpc r23, r1 + 7fc: 09 f4 brne .+2 ; 0x800 + 7fe: 84 c0 rjmp .+264 ; 0x908 + 800: 41 15 cp r20, r1 + 802: 51 05 cpc r21, r1 + 804: 09 f4 brne .+2 ; 0x808 + 806: 83 c0 rjmp .+262 ; 0x90e + 808: 7c 01 movw r14, r24 + 80a: dc 01 movw r26, r24 + 80c: 6d 93 st X+, r22 + 80e: 7c 93 st X, r23 + 810: 11 97 sbiw r26, 0x01 ; 1 + 812: 12 96 adiw r26, 0x02 ; 2 + 814: 4d 93 st X+, r20 + 816: 5c 93 st X, r21 + 818: 13 97 sbiw r26, 0x03 ; 3 + 81a: fc 01 movw r30, r24 + 81c: 34 96 adiw r30, 0x04 ; 4 + 81e: 84 e5 ldi r24, 0x54 ; 84 + 820: df 01 movw r26, r30 + 822: 1d 92 st X+, r1 + 824: 8a 95 dec r24 + 826: e9 f7 brne .-6 ; 0x822 + 828: 8f ef ldi r24, 0xFF ; 255 + 82a: 89 83 std Y+1, r24 ; 0x01 + 82c: 01 e0 ldi r16, 0x01 ; 1 + 82e: 10 e0 ldi r17, 0x00 ; 0 + 830: 20 e0 ldi r18, 0x00 ; 0 + 832: 30 e0 ldi r19, 0x00 ; 0 + 834: ae 01 movw r20, r28 + 836: 4f 5f subi r20, 0xFF ; 255 + 838: 5f 4f sbci r21, 0xFF ; 255 + 83a: 63 e0 ldi r22, 0x03 ; 3 + 83c: c7 01 movw r24, r14 + 83e: 77 df rcall .-274 ; 0x72e + 840: 80 e8 ldi r24, 0x80 ; 128 + 842: 89 83 std Y+1, r24 ; 0x01 + 844: 01 e0 ldi r16, 0x01 ; 1 + 846: 10 e0 ldi r17, 0x00 ; 0 + 848: 20 e0 ldi r18, 0x00 ; 0 + 84a: 30 e0 ldi r19, 0x00 ; 0 + 84c: ae 01 movw r20, r28 + 84e: 4f 5f subi r20, 0xFF ; 255 + 850: 5f 4f sbci r21, 0xFF ; 255 + 852: 60 e1 ldi r22, 0x10 ; 16 + 854: c7 01 movw r24, r14 + 856: 6b df rcall .-298 ; 0x72e + 858: 01 e0 ldi r16, 0x01 ; 1 + 85a: 10 e0 ldi r17, 0x00 ; 0 + 85c: 20 e0 ldi r18, 0x00 ; 0 + 85e: 30 e0 ldi r19, 0x00 ; 0 + 860: ae 01 movw r20, r28 + 862: 4f 5f subi r20, 0xFF ; 255 + 864: 5f 4f sbci r21, 0xFF ; 255 + 866: 61 e1 ldi r22, 0x11 ; 17 + 868: c7 01 movw r24, r14 + 86a: 61 df rcall .-318 ; 0x72e + 86c: 01 e0 ldi r16, 0x01 ; 1 + 86e: 10 e0 ldi r17, 0x00 ; 0 + 870: 20 e0 ldi r18, 0x00 ; 0 + 872: 30 e0 ldi r19, 0x00 ; 0 + 874: ae 01 movw r20, r28 + 876: 4f 5f subi r20, 0xFF ; 255 + 878: 5f 4f sbci r21, 0xFF ; 255 + 87a: 62 e1 ldi r22, 0x12 ; 18 + 87c: c7 01 movw r24, r14 + 87e: 57 df rcall .-338 ; 0x72e + 880: 01 e0 ldi r16, 0x01 ; 1 + 882: 10 e0 ldi r17, 0x00 ; 0 + 884: 20 e0 ldi r18, 0x00 ; 0 + 886: 30 e0 ldi r19, 0x00 ; 0 + 888: ae 01 movw r20, r28 + 88a: 4f 5f subi r20, 0xFF ; 255 + 88c: 5f 4f sbci r21, 0xFF ; 255 + 88e: 63 e1 ldi r22, 0x13 ; 19 + 890: c7 01 movw r24, r14 + 892: 4d df rcall .-358 ; 0x72e + 894: 01 e0 ldi r16, 0x01 ; 1 + 896: 10 e0 ldi r17, 0x00 ; 0 + 898: 20 e0 ldi r18, 0x00 ; 0 + 89a: 30 e0 ldi r19, 0x00 ; 0 + 89c: ae 01 movw r20, r28 + 89e: 4f 5f subi r20, 0xFF ; 255 + 8a0: 5f 4f sbci r21, 0xFF ; 255 + 8a2: 64 e1 ldi r22, 0x14 ; 20 + 8a4: c7 01 movw r24, r14 + 8a6: 43 df rcall .-378 ; 0x72e + 8a8: 01 e0 ldi r16, 0x01 ; 1 + 8aa: 10 e0 ldi r17, 0x00 ; 0 + 8ac: 20 e0 ldi r18, 0x00 ; 0 + 8ae: 30 e0 ldi r19, 0x00 ; 0 + 8b0: ae 01 movw r20, r28 + 8b2: 4f 5f subi r20, 0xFF ; 255 + 8b4: 5f 4f sbci r21, 0xFF ; 255 + 8b6: 65 e1 ldi r22, 0x15 ; 21 + 8b8: c7 01 movw r24, r14 + 8ba: 39 df rcall .-398 ; 0x72e + 8bc: 01 e0 ldi r16, 0x01 ; 1 + 8be: 10 e0 ldi r17, 0x00 ; 0 + 8c0: 20 e0 ldi r18, 0x00 ; 0 + 8c2: 30 e0 ldi r19, 0x00 ; 0 + 8c4: ae 01 movw r20, r28 + 8c6: 4f 5f subi r20, 0xFF ; 255 + 8c8: 5f 4f sbci r21, 0xFF ; 255 + 8ca: 66 e1 ldi r22, 0x16 ; 22 + 8cc: c7 01 movw r24, r14 + 8ce: 2f df rcall .-418 ; 0x72e + 8d0: 01 e0 ldi r16, 0x01 ; 1 + 8d2: 10 e0 ldi r17, 0x00 ; 0 + 8d4: 20 e0 ldi r18, 0x00 ; 0 + 8d6: 30 e0 ldi r19, 0x00 ; 0 + 8d8: ae 01 movw r20, r28 + 8da: 4f 5f subi r20, 0xFF ; 255 + 8dc: 5f 4f sbci r21, 0xFF ; 255 + 8de: 67 e1 ldi r22, 0x17 ; 23 + 8e0: c7 01 movw r24, r14 + 8e2: 25 df rcall .-438 ; 0x72e + 8e4: 80 ec ldi r24, 0xC0 ; 192 + 8e6: 89 83 std Y+1, r24 ; 0x01 + 8e8: 01 e0 ldi r16, 0x01 ; 1 + 8ea: 10 e0 ldi r17, 0x00 ; 0 + 8ec: 20 e0 ldi r18, 0x00 ; 0 + 8ee: 30 e0 ldi r19, 0x00 ; 0 + 8f0: ae 01 movw r20, r28 + 8f2: 4f 5f subi r20, 0xFF ; 255 + 8f4: 5f 4f sbci r21, 0xFF ; 255 + 8f6: 67 eb ldi r22, 0xB7 ; 183 + 8f8: c7 01 movw r24, r14 + 8fa: 19 df rcall .-462 ; 0x72e 8fc: 80 e0 ldi r24, 0x00 ; 0 8fe: 90 e0 ldi r25, 0x00 ; 0 - 900: 1f 91 pop r17 - 902: 0f 91 pop r16 - 904: ff 90 pop r15 - 906: ef 90 pop r14 - 908: df 90 pop r13 - 90a: cf 90 pop r12 - 90c: bf 90 pop r11 - 90e: af 90 pop r10 - 910: 08 95 ret + 900: 08 c0 rjmp .+16 ; 0x912 + 902: 8f ef ldi r24, 0xFF ; 255 + 904: 9f ef ldi r25, 0xFF ; 255 + 906: 05 c0 rjmp .+10 ; 0x912 + 908: 8f ef ldi r24, 0xFF ; 255 + 90a: 9f ef ldi r25, 0xFF ; 255 + 90c: 02 c0 rjmp .+4 ; 0x912 + 90e: 8f ef ldi r24, 0xFF ; 255 + 910: 9f ef ldi r25, 0xFF ; 255 + 912: 0f 90 pop r0 + 914: df 91 pop r29 + 916: cf 91 pop r28 + 918: 1f 91 pop r17 + 91a: 0f 91 pop r16 + 91c: ff 90 pop r15 + 91e: ef 90 pop r14 + 920: 08 95 ret -00000912 : - 912: 0f 93 push r16 - 914: 1f 93 push r17 - 916: 66 23 and r22, r22 - 918: 19 f0 breq .+6 ; 0x920 - 91a: 61 30 cpi r22, 0x01 ; 1 - 91c: 39 f0 breq .+14 ; 0x92c - 91e: 0b c0 rjmp .+22 ; 0x936 - 920: fc 01 movw r30, r24 - 922: 27 81 ldd r18, Z+7 ; 0x07 - 924: 40 fb bst r20, 0 - 926: 20 f9 bld r18, 0 - 928: 27 83 std Z+7, r18 ; 0x07 - 92a: 05 c0 rjmp .+10 ; 0x936 - 92c: fc 01 movw r30, r24 - 92e: 27 81 ldd r18, Z+7 ; 0x07 - 930: 40 fb bst r20, 0 - 932: 21 f9 bld r18, 1 - 934: 27 83 std Z+7, r18 ; 0x07 - 936: ac 01 movw r20, r24 - 938: 49 5f subi r20, 0xF9 ; 249 - 93a: 5f 4f sbci r21, 0xFF ; 255 - 93c: 01 e0 ldi r16, 0x01 ; 1 - 93e: 10 e0 ldi r17, 0x00 ; 0 - 940: 20 e0 ldi r18, 0x00 ; 0 - 942: 30 e0 ldi r19, 0x00 ; 0 - 944: 63 e0 ldi r22, 0x03 ; 3 - 946: 46 df rcall .-372 ; 0x7d4 - 948: 80 e0 ldi r24, 0x00 ; 0 - 94a: 90 e0 ldi r25, 0x00 ; 0 - 94c: 1f 91 pop r17 - 94e: 0f 91 pop r16 - 950: 08 95 ret +00000922 : + 922: 0f 93 push r16 + 924: 1f 93 push r17 + 926: cf 93 push r28 + 928: df 93 push r29 + 92a: 82 30 cpi r24, 0x02 ; 2 + 92c: 91 05 cpc r25, r1 + 92e: 10 f4 brcc .+4 ; 0x934 + 930: 82 e0 ldi r24, 0x02 ; 2 + 932: 90 e0 ldi r25, 0x00 ; 0 + 934: e0 91 66 3f lds r30, 0x3F66 ; 0x803f66 <__flp> + 938: f0 91 67 3f lds r31, 0x3F67 ; 0x803f67 <__flp+0x1> + 93c: 20 e0 ldi r18, 0x00 ; 0 + 93e: 30 e0 ldi r19, 0x00 ; 0 + 940: a0 e0 ldi r26, 0x00 ; 0 + 942: b0 e0 ldi r27, 0x00 ; 0 + 944: 30 97 sbiw r30, 0x00 ; 0 + 946: 19 f1 breq .+70 ; 0x98e + 948: 40 81 ld r20, Z + 94a: 51 81 ldd r21, Z+1 ; 0x01 + 94c: 02 81 ldd r16, Z+2 ; 0x02 + 94e: 13 81 ldd r17, Z+3 ; 0x03 + 950: 48 17 cp r20, r24 + 952: 59 07 cpc r21, r25 + 954: c8 f0 brcs .+50 ; 0x988 + 956: 84 17 cp r24, r20 + 958: 95 07 cpc r25, r21 + 95a: 69 f4 brne .+26 ; 0x976 + 95c: 10 97 sbiw r26, 0x00 ; 0 + 95e: 31 f0 breq .+12 ; 0x96c + 960: 12 96 adiw r26, 0x02 ; 2 + 962: 0c 93 st X, r16 + 964: 12 97 sbiw r26, 0x02 ; 2 + 966: 13 96 adiw r26, 0x03 ; 3 + 968: 1c 93 st X, r17 + 96a: 27 c0 rjmp .+78 ; 0x9ba + 96c: 00 93 66 3f sts 0x3F66, r16 ; 0x803f66 <__flp> + 970: 10 93 67 3f sts 0x3F67, r17 ; 0x803f67 <__flp+0x1> + 974: 22 c0 rjmp .+68 ; 0x9ba + 976: 21 15 cp r18, r1 + 978: 31 05 cpc r19, r1 + 97a: 19 f0 breq .+6 ; 0x982 + 97c: 42 17 cp r20, r18 + 97e: 53 07 cpc r21, r19 + 980: 18 f4 brcc .+6 ; 0x988 + 982: 9a 01 movw r18, r20 + 984: bd 01 movw r22, r26 + 986: ef 01 movw r28, r30 + 988: df 01 movw r26, r30 + 98a: f8 01 movw r30, r16 + 98c: db cf rjmp .-74 ; 0x944 + 98e: 21 15 cp r18, r1 + 990: 31 05 cpc r19, r1 + 992: f9 f0 breq .+62 ; 0x9d2 + 994: 28 1b sub r18, r24 + 996: 39 0b sbc r19, r25 + 998: 24 30 cpi r18, 0x04 ; 4 + 99a: 31 05 cpc r19, r1 + 99c: 80 f4 brcc .+32 ; 0x9be + 99e: 8a 81 ldd r24, Y+2 ; 0x02 + 9a0: 9b 81 ldd r25, Y+3 ; 0x03 + 9a2: 61 15 cp r22, r1 + 9a4: 71 05 cpc r23, r1 + 9a6: 21 f0 breq .+8 ; 0x9b0 + 9a8: fb 01 movw r30, r22 + 9aa: 82 83 std Z+2, r24 ; 0x02 + 9ac: 93 83 std Z+3, r25 ; 0x03 + 9ae: 04 c0 rjmp .+8 ; 0x9b8 + 9b0: 80 93 66 3f sts 0x3F66, r24 ; 0x803f66 <__flp> + 9b4: 90 93 67 3f sts 0x3F67, r25 ; 0x803f67 <__flp+0x1> + 9b8: fe 01 movw r30, r28 + 9ba: 32 96 adiw r30, 0x02 ; 2 + 9bc: 44 c0 rjmp .+136 ; 0xa46 + 9be: fe 01 movw r30, r28 + 9c0: e2 0f add r30, r18 + 9c2: f3 1f adc r31, r19 + 9c4: 81 93 st Z+, r24 + 9c6: 91 93 st Z+, r25 + 9c8: 22 50 subi r18, 0x02 ; 2 + 9ca: 31 09 sbc r19, r1 + 9cc: 28 83 st Y, r18 + 9ce: 39 83 std Y+1, r19 ; 0x01 + 9d0: 3a c0 rjmp .+116 ; 0xa46 + 9d2: 20 91 64 3f lds r18, 0x3F64 ; 0x803f64 <__brkval> + 9d6: 30 91 65 3f lds r19, 0x3F65 ; 0x803f65 <__brkval+0x1> + 9da: 23 2b or r18, r19 + 9dc: 41 f4 brne .+16 ; 0x9ee + 9de: 20 91 02 3f lds r18, 0x3F02 ; 0x803f02 <__malloc_heap_start> + 9e2: 30 91 03 3f lds r19, 0x3F03 ; 0x803f03 <__malloc_heap_start+0x1> + 9e6: 20 93 64 3f sts 0x3F64, r18 ; 0x803f64 <__brkval> + 9ea: 30 93 65 3f sts 0x3F65, r19 ; 0x803f65 <__brkval+0x1> + 9ee: 20 91 00 3f lds r18, 0x3F00 ; 0x803f00 <__DATA_REGION_ORIGIN__> + 9f2: 30 91 01 3f lds r19, 0x3F01 ; 0x803f01 <__DATA_REGION_ORIGIN__+0x1> + 9f6: 21 15 cp r18, r1 + 9f8: 31 05 cpc r19, r1 + 9fa: 41 f4 brne .+16 ; 0xa0c + 9fc: 2d b7 in r18, 0x3d ; 61 + 9fe: 3e b7 in r19, 0x3e ; 62 + a00: 40 91 04 3f lds r20, 0x3F04 ; 0x803f04 <__malloc_margin> + a04: 50 91 05 3f lds r21, 0x3F05 ; 0x803f05 <__malloc_margin+0x1> + a08: 24 1b sub r18, r20 + a0a: 35 0b sbc r19, r21 + a0c: e0 91 64 3f lds r30, 0x3F64 ; 0x803f64 <__brkval> + a10: f0 91 65 3f lds r31, 0x3F65 ; 0x803f65 <__brkval+0x1> + a14: e2 17 cp r30, r18 + a16: f3 07 cpc r31, r19 + a18: a0 f4 brcc .+40 ; 0xa42 + a1a: 2e 1b sub r18, r30 + a1c: 3f 0b sbc r19, r31 + a1e: 28 17 cp r18, r24 + a20: 39 07 cpc r19, r25 + a22: 78 f0 brcs .+30 ; 0xa42 + a24: ac 01 movw r20, r24 + a26: 4e 5f subi r20, 0xFE ; 254 + a28: 5f 4f sbci r21, 0xFF ; 255 + a2a: 24 17 cp r18, r20 + a2c: 35 07 cpc r19, r21 + a2e: 48 f0 brcs .+18 ; 0xa42 + a30: 4e 0f add r20, r30 + a32: 5f 1f adc r21, r31 + a34: 40 93 64 3f sts 0x3F64, r20 ; 0x803f64 <__brkval> + a38: 50 93 65 3f sts 0x3F65, r21 ; 0x803f65 <__brkval+0x1> + a3c: 81 93 st Z+, r24 + a3e: 91 93 st Z+, r25 + a40: 02 c0 rjmp .+4 ; 0xa46 + a42: e0 e0 ldi r30, 0x00 ; 0 + a44: f0 e0 ldi r31, 0x00 ; 0 + a46: cf 01 movw r24, r30 + a48: df 91 pop r29 + a4a: cf 91 pop r28 + a4c: 1f 91 pop r17 + a4e: 0f 91 pop r16 + a50: 08 95 ret -00000952 : - 952: 0f 93 push r16 - 954: 1f 93 push r17 - 956: 66 23 and r22, r22 - 958: 19 f0 breq .+6 ; 0x960 - 95a: 61 30 cpi r22, 0x01 ; 1 - 95c: a1 f0 breq .+40 ; 0x986 - 95e: 22 c0 rjmp .+68 ; 0x9a4 - 960: fc 01 movw r30, r24 - 962: 22 85 ldd r18, Z+10 ; 0x0a - 964: 40 fb bst r20, 0 - 966: 27 f9 bld r18, 7 - 968: 33 85 ldd r19, Z+11 ; 0x0b - 96a: 3f 7d andi r19, 0xDF ; 223 - 96c: 33 87 std Z+11, r19 ; 0x0b - 96e: 2f 64 ori r18, 0x4F ; 79 - 970: 22 87 std Z+10, r18 ; 0x0a - 972: ac 01 movw r20, r24 - 974: 46 5f subi r20, 0xF6 ; 246 - 976: 5f 4f sbci r21, 0xFF ; 255 - 978: 01 e0 ldi r16, 0x01 ; 1 - 97a: 10 e0 ldi r17, 0x00 ; 0 - 97c: 20 e0 ldi r18, 0x00 ; 0 - 97e: 30 e0 ldi r19, 0x00 ; 0 - 980: 60 e1 ldi r22, 0x10 ; 16 - 982: 28 df rcall .-432 ; 0x7d4 - 984: 0f c0 rjmp .+30 ; 0x9a4 - 986: fc 01 movw r30, r24 - 988: 23 85 ldd r18, Z+11 ; 0x0b - 98a: 40 fb bst r20, 0 - 98c: 27 f9 bld r18, 7 - 98e: 2f 66 ori r18, 0x6F ; 111 - 990: 23 87 std Z+11, r18 ; 0x0b - 992: ac 01 movw r20, r24 - 994: 45 5f subi r20, 0xF5 ; 245 - 996: 5f 4f sbci r21, 0xFF ; 255 - 998: 01 e0 ldi r16, 0x01 ; 1 - 99a: 10 e0 ldi r17, 0x00 ; 0 - 99c: 20 e0 ldi r18, 0x00 ; 0 - 99e: 30 e0 ldi r19, 0x00 ; 0 - 9a0: 61 e1 ldi r22, 0x11 ; 17 - 9a2: 18 df rcall .-464 ; 0x7d4 - 9a4: 80 e0 ldi r24, 0x00 ; 0 - 9a6: 90 e0 ldi r25, 0x00 ; 0 - 9a8: 1f 91 pop r17 - 9aa: 0f 91 pop r16 - 9ac: 08 95 ret +00000a52 : + a52: cf 93 push r28 + a54: df 93 push r29 + a56: 00 97 sbiw r24, 0x00 ; 0 + a58: 09 f4 brne .+2 ; 0xa5c + a5a: 81 c0 rjmp .+258 ; 0xb5e + a5c: fc 01 movw r30, r24 + a5e: 32 97 sbiw r30, 0x02 ; 2 + a60: 12 82 std Z+2, r1 ; 0x02 + a62: 13 82 std Z+3, r1 ; 0x03 + a64: a0 91 66 3f lds r26, 0x3F66 ; 0x803f66 <__flp> + a68: b0 91 67 3f lds r27, 0x3F67 ; 0x803f67 <__flp+0x1> + a6c: 10 97 sbiw r26, 0x00 ; 0 + a6e: 81 f4 brne .+32 ; 0xa90 + a70: 20 81 ld r18, Z + a72: 31 81 ldd r19, Z+1 ; 0x01 + a74: 82 0f add r24, r18 + a76: 93 1f adc r25, r19 + a78: 20 91 64 3f lds r18, 0x3F64 ; 0x803f64 <__brkval> + a7c: 30 91 65 3f lds r19, 0x3F65 ; 0x803f65 <__brkval+0x1> + a80: 28 17 cp r18, r24 + a82: 39 07 cpc r19, r25 + a84: 51 f5 brne .+84 ; 0xada + a86: e0 93 64 3f sts 0x3F64, r30 ; 0x803f64 <__brkval> + a8a: f0 93 65 3f sts 0x3F65, r31 ; 0x803f65 <__brkval+0x1> + a8e: 67 c0 rjmp .+206 ; 0xb5e + a90: ed 01 movw r28, r26 + a92: 20 e0 ldi r18, 0x00 ; 0 + a94: 30 e0 ldi r19, 0x00 ; 0 + a96: ce 17 cp r28, r30 + a98: df 07 cpc r29, r31 + a9a: 40 f4 brcc .+16 ; 0xaac + a9c: 4a 81 ldd r20, Y+2 ; 0x02 + a9e: 5b 81 ldd r21, Y+3 ; 0x03 + aa0: 9e 01 movw r18, r28 + aa2: 41 15 cp r20, r1 + aa4: 51 05 cpc r21, r1 + aa6: f1 f0 breq .+60 ; 0xae4 + aa8: ea 01 movw r28, r20 + aaa: f5 cf rjmp .-22 ; 0xa96 + aac: c2 83 std Z+2, r28 ; 0x02 + aae: d3 83 std Z+3, r29 ; 0x03 + ab0: 40 81 ld r20, Z + ab2: 51 81 ldd r21, Z+1 ; 0x01 + ab4: 84 0f add r24, r20 + ab6: 95 1f adc r25, r21 + ab8: c8 17 cp r28, r24 + aba: d9 07 cpc r29, r25 + abc: 59 f4 brne .+22 ; 0xad4 + abe: 88 81 ld r24, Y + ac0: 99 81 ldd r25, Y+1 ; 0x01 + ac2: 84 0f add r24, r20 + ac4: 95 1f adc r25, r21 + ac6: 02 96 adiw r24, 0x02 ; 2 + ac8: 80 83 st Z, r24 + aca: 91 83 std Z+1, r25 ; 0x01 + acc: 8a 81 ldd r24, Y+2 ; 0x02 + ace: 9b 81 ldd r25, Y+3 ; 0x03 + ad0: 82 83 std Z+2, r24 ; 0x02 + ad2: 93 83 std Z+3, r25 ; 0x03 + ad4: 21 15 cp r18, r1 + ad6: 31 05 cpc r19, r1 + ad8: 29 f4 brne .+10 ; 0xae4 + ada: e0 93 66 3f sts 0x3F66, r30 ; 0x803f66 <__flp> + ade: f0 93 67 3f sts 0x3F67, r31 ; 0x803f67 <__flp+0x1> + ae2: 3d c0 rjmp .+122 ; 0xb5e + ae4: e9 01 movw r28, r18 + ae6: ea 83 std Y+2, r30 ; 0x02 + ae8: fb 83 std Y+3, r31 ; 0x03 + aea: 49 91 ld r20, Y+ + aec: 59 91 ld r21, Y+ + aee: c4 0f add r28, r20 + af0: d5 1f adc r29, r21 + af2: ec 17 cp r30, r28 + af4: fd 07 cpc r31, r29 + af6: 61 f4 brne .+24 ; 0xb10 + af8: 80 81 ld r24, Z + afa: 91 81 ldd r25, Z+1 ; 0x01 + afc: 84 0f add r24, r20 + afe: 95 1f adc r25, r21 + b00: 02 96 adiw r24, 0x02 ; 2 + b02: e9 01 movw r28, r18 + b04: 88 83 st Y, r24 + b06: 99 83 std Y+1, r25 ; 0x01 + b08: 82 81 ldd r24, Z+2 ; 0x02 + b0a: 93 81 ldd r25, Z+3 ; 0x03 + b0c: 8a 83 std Y+2, r24 ; 0x02 + b0e: 9b 83 std Y+3, r25 ; 0x03 + b10: e0 e0 ldi r30, 0x00 ; 0 + b12: f0 e0 ldi r31, 0x00 ; 0 + b14: 12 96 adiw r26, 0x02 ; 2 + b16: 8d 91 ld r24, X+ + b18: 9c 91 ld r25, X + b1a: 13 97 sbiw r26, 0x03 ; 3 + b1c: 00 97 sbiw r24, 0x00 ; 0 + b1e: 19 f0 breq .+6 ; 0xb26 + b20: fd 01 movw r30, r26 + b22: dc 01 movw r26, r24 + b24: f7 cf rjmp .-18 ; 0xb14 + b26: 8d 91 ld r24, X+ + b28: 9c 91 ld r25, X + b2a: 11 97 sbiw r26, 0x01 ; 1 + b2c: 9d 01 movw r18, r26 + b2e: 2e 5f subi r18, 0xFE ; 254 + b30: 3f 4f sbci r19, 0xFF ; 255 + b32: 82 0f add r24, r18 + b34: 93 1f adc r25, r19 + b36: 20 91 64 3f lds r18, 0x3F64 ; 0x803f64 <__brkval> + b3a: 30 91 65 3f lds r19, 0x3F65 ; 0x803f65 <__brkval+0x1> + b3e: 28 17 cp r18, r24 + b40: 39 07 cpc r19, r25 + b42: 69 f4 brne .+26 ; 0xb5e + b44: 30 97 sbiw r30, 0x00 ; 0 + b46: 29 f4 brne .+10 ; 0xb52 + b48: 10 92 66 3f sts 0x3F66, r1 ; 0x803f66 <__flp> + b4c: 10 92 67 3f sts 0x3F67, r1 ; 0x803f67 <__flp+0x1> + b50: 02 c0 rjmp .+4 ; 0xb56 + b52: 12 82 std Z+2, r1 ; 0x02 + b54: 13 82 std Z+3, r1 ; 0x03 + b56: a0 93 64 3f sts 0x3F64, r26 ; 0x803f64 <__brkval> + b5a: b0 93 65 3f sts 0x3F65, r27 ; 0x803f65 <__brkval+0x1> + b5e: df 91 pop r29 + b60: cf 91 pop r28 + b62: 08 95 ret -000009ae : - 9ae: 0f 93 push r16 - 9b0: 1f 93 push r17 - 9b2: 66 23 and r22, r22 - 9b4: 19 f0 breq .+6 ; 0x9bc - 9b6: 61 30 cpi r22, 0x01 ; 1 - 9b8: 39 f0 breq .+14 ; 0x9c8 - 9ba: 0a c0 rjmp .+20 ; 0x9d0 - 9bc: fc 01 movw r30, r24 - 9be: 21 85 ldd r18, Z+9 ; 0x09 - 9c0: 2b 7f andi r18, 0xFB ; 251 - 9c2: 27 7f andi r18, 0xF7 ; 247 - 9c4: 21 87 std Z+9, r18 ; 0x09 - 9c6: 04 c0 rjmp .+8 ; 0x9d0 - 9c8: fc 01 movw r30, r24 - 9ca: 21 85 ldd r18, Z+9 ; 0x09 - 9cc: 24 60 ori r18, 0x04 ; 4 - 9ce: 21 87 std Z+9, r18 ; 0x09 - 9d0: ac 01 movw r20, r24 - 9d2: 47 5f subi r20, 0xF7 ; 247 - 9d4: 5f 4f sbci r21, 0xFF ; 255 - 9d6: 01 e0 ldi r16, 0x01 ; 1 - 9d8: 10 e0 ldi r17, 0x00 ; 0 - 9da: 20 e0 ldi r18, 0x00 ; 0 - 9dc: 30 e0 ldi r19, 0x00 ; 0 - 9de: 60 ef ldi r22, 0xF0 ; 240 - 9e0: f9 de rcall .-526 ; 0x7d4 - 9e2: 80 e0 ldi r24, 0x00 ; 0 - 9e4: 90 e0 ldi r25, 0x00 ; 0 - 9e6: 1f 91 pop r17 - 9e8: 0f 91 pop r16 - 9ea: 08 95 ret +00000b64 : + b64: fb 01 movw r30, r22 + b66: dc 01 movw r26, r24 + b68: 02 c0 rjmp .+4 ; 0xb6e + b6a: 01 90 ld r0, Z+ + b6c: 0d 92 st X+, r0 + b6e: 41 50 subi r20, 0x01 ; 1 + b70: 50 40 sbci r21, 0x00 ; 0 + b72: d8 f7 brcc .-10 ; 0xb6a + b74: 08 95 ret -000009ec : - 9ec: 0f 93 push r16 - 9ee: 1f 93 push r17 - 9f0: 31 e0 ldi r19, 0x01 ; 1 - 9f2: 61 11 cpse r22, r1 - 9f4: 01 c0 rjmp .+2 ; 0x9f8 - 9f6: 30 e0 ldi r19, 0x00 ; 0 - 9f8: fc 01 movw r30, r24 - 9fa: e9 5a subi r30, 0xA9 ; 169 - 9fc: ff 4f sbci r31, 0xFF ; 255 - 9fe: 20 81 ld r18, Z - a00: 30 fb bst r19, 0 - a02: 25 f9 bld r18, 5 - a04: 20 83 st Z, r18 - a06: 31 e0 ldi r19, 0x01 ; 1 - a08: 41 11 cpse r20, r1 - a0a: 01 c0 rjmp .+2 ; 0xa0e - a0c: 30 e0 ldi r19, 0x00 ; 0 - a0e: ac 01 movw r20, r24 - a10: 49 5a subi r20, 0xA9 ; 169 - a12: 5f 4f sbci r21, 0xFF ; 255 - a14: fa 01 movw r30, r20 - a16: 20 81 ld r18, Z - a18: 30 fb bst r19, 0 - a1a: 27 f9 bld r18, 7 - a1c: 20 83 st Z, r18 - a1e: 01 e0 ldi r16, 0x01 ; 1 - a20: 10 e0 ldi r17, 0x00 ; 0 - a22: 20 e0 ldi r18, 0x00 ; 0 - a24: 30 e0 ldi r19, 0x00 ; 0 - a26: 61 eb ldi r22, 0xB1 ; 177 - a28: d5 de rcall .-598 ; 0x7d4 - a2a: 80 e0 ldi r24, 0x00 ; 0 - a2c: 90 e0 ldi r25, 0x00 ; 0 - a2e: 1f 91 pop r17 - a30: 0f 91 pop r16 - a32: 08 95 ret +00000b76 : + b76: 03 d0 rcall .+6 ; 0xb7e + b78: 80 81 ld r24, Z + b7a: 99 27 eor r25, r25 + b7c: 08 95 ret -00000a34 : - a34: af 92 push r10 - a36: bf 92 push r11 - a38: cf 92 push r12 - a3a: df 92 push r13 - a3c: ef 92 push r14 - a3e: ff 92 push r15 - a40: 0f 93 push r16 - a42: 1f 93 push r17 - a44: cf 93 push r28 - a46: df 93 push r29 - a48: ec 01 movw r28, r24 - a4a: 66 23 and r22, r22 - a4c: 19 f0 breq .+6 ; 0xa54 - a4e: 61 30 cpi r22, 0x01 ; 1 - a50: 01 f1 breq .+64 ; 0xa92 - a52: 3d c0 rjmp .+122 ; 0xace - a54: 42 70 andi r20, 0x02 ; 2 - a56: 8e 89 ldd r24, Y+22 ; 0x16 - a58: 8c 7f andi r24, 0xFC ; 252 - a5a: 48 2b or r20, r24 - a5c: 4e 8b std Y+22, r20 ; 0x16 - a5e: 3f 8b std Y+23, r19 ; 0x17 - a60: 28 8f std Y+24, r18 ; 0x18 - a62: d8 01 movw r26, r16 - a64: c7 01 movw r24, r14 - a66: 88 27 eor r24, r24 - a68: 99 27 eor r25, r25 - a6a: af 70 andi r26, 0x0F ; 15 - a6c: bb 27 eor r27, r27 - a6e: fa 8e std Y+26, r15 ; 0x1a - a70: eb 8e std Y+27, r14 ; 0x1b - a72: 8a 2f mov r24, r26 - a74: 8f 70 andi r24, 0x0F ; 15 - a76: 89 8f std Y+25, r24 ; 0x19 - a78: bc 8a std Y+20, r11 ; 0x14 - a7a: ad 8a std Y+21, r10 ; 0x15 - a7c: 08 e0 ldi r16, 0x08 ; 8 - a7e: 10 e0 ldi r17, 0x00 ; 0 - a80: 20 e0 ldi r18, 0x00 ; 0 - a82: 30 e0 ldi r19, 0x00 ; 0 - a84: ae 01 movw r20, r28 - a86: 4c 5e subi r20, 0xEC ; 236 - a88: 5f 4f sbci r21, 0xFF ; 255 - a8a: 6a e1 ldi r22, 0x1A ; 26 - a8c: ce 01 movw r24, r28 - a8e: a2 de rcall .-700 ; 0x7d4 - a90: 1e c0 rjmp .+60 ; 0xace - a92: 42 70 andi r20, 0x02 ; 2 - a94: 8e 8d ldd r24, Y+30 ; 0x1e - a96: 8c 7f andi r24, 0xFC ; 252 - a98: 48 2b or r20, r24 - a9a: 4e 8f std Y+30, r20 ; 0x1e - a9c: 3f 8f std Y+31, r19 ; 0x1f - a9e: 28 a3 std Y+32, r18 ; 0x20 - aa0: d8 01 movw r26, r16 - aa2: c7 01 movw r24, r14 - aa4: 88 27 eor r24, r24 - aa6: 99 27 eor r25, r25 - aa8: af 70 andi r26, 0x0F ; 15 - aaa: bb 27 eor r27, r27 - aac: fa a2 std Y+34, r15 ; 0x22 - aae: eb a2 std Y+35, r14 ; 0x23 - ab0: 8a 2f mov r24, r26 - ab2: 8f 70 andi r24, 0x0F ; 15 - ab4: 89 a3 std Y+33, r24 ; 0x21 - ab6: bc 8e std Y+28, r11 ; 0x1c - ab8: ad 8e std Y+29, r10 ; 0x1d - aba: 08 e0 ldi r16, 0x08 ; 8 - abc: 10 e0 ldi r17, 0x00 ; 0 - abe: 20 e0 ldi r18, 0x00 ; 0 - ac0: 30 e0 ldi r19, 0x00 ; 0 - ac2: ae 01 movw r20, r28 - ac4: 44 5e subi r20, 0xE4 ; 228 - ac6: 5f 4f sbci r21, 0xFF ; 255 - ac8: 62 e2 ldi r22, 0x22 ; 34 - aca: ce 01 movw r24, r28 - acc: 83 de rcall .-762 ; 0x7d4 - ace: 41 e0 ldi r20, 0x01 ; 1 - ad0: 61 e0 ldi r22, 0x01 ; 1 - ad2: ce 01 movw r24, r28 - ad4: 8b df rcall .-234 ; 0x9ec - ad6: 80 e0 ldi r24, 0x00 ; 0 - ad8: 90 e0 ldi r25, 0x00 ; 0 - ada: df 91 pop r29 - adc: cf 91 pop r28 - ade: 1f 91 pop r17 - ae0: 0f 91 pop r16 - ae2: ff 90 pop r15 - ae4: ef 90 pop r14 - ae6: df 90 pop r13 - ae8: cf 90 pop r12 - aea: bf 90 pop r11 - aec: af 90 pop r10 - aee: 08 95 ret +00000b7e : + b7e: fc 01 movw r30, r24 + b80: e0 50 subi r30, 0x00 ; 0 + b82: fc 4e sbci r31, 0xEC ; 236 + b84: 08 95 ret -00000af0 : +00000b86 : + b86: 26 2f mov r18, r22 -int cm_si5351_init(si5351_driver *inst, void *i2c_transfer_inst, setGet_I2C_Event_fpt i2c_transfer_evt){ - af0: ef 92 push r14 - af2: ff 92 push r15 - af4: 0f 93 push r16 - af6: 1f 93 push r17 - af8: cf 93 push r28 - afa: df 93 push r29 - afc: 1f 92 push r1 - afe: cd b7 in r28, 0x3d ; 61 - b00: de b7 in r29, 0x3e ; 62 +00000b88 : + b88: af 93 push r26 + b8a: bf 93 push r27 + b8c: e0 e0 ldi r30, 0x00 ; 0 + b8e: f0 e1 ldi r31, 0x10 ; 16 + b90: 32 81 ldd r19, Z+2 ; 0x02 + b92: 31 fd sbrc r19, 1 + b94: fd cf rjmp .-6 ; 0xb90 + b96: dc 01 movw r26, r24 + b98: a0 50 subi r26, 0x00 ; 0 + b9a: bc 4e sbci r27, 0xEC ; 236 + b9c: 2c 93 st X, r18 + b9e: 2d e9 ldi r18, 0x9D ; 157 + ba0: 24 bf out 0x34, r18 ; 52 + ba2: 23 e0 ldi r18, 0x03 ; 3 + ba4: 20 83 st Z, r18 + ba6: 01 96 adiw r24, 0x01 ; 1 + ba8: bf 91 pop r27 + baa: af 91 pop r26 + bac: 08 95 ret - if(inst == NULL)return -1; - b02: 00 97 sbiw r24, 0x00 ; 0 - b04: 09 f4 brne .+2 ; 0xb08 - b06: 85 c0 rjmp .+266 ; 0xc12 - if(i2c_transfer_inst == NULL)return -1; - b08: 61 15 cp r22, r1 - b0a: 71 05 cpc r23, r1 - b0c: 09 f4 brne .+2 ; 0xb10 - b0e: 84 c0 rjmp .+264 ; 0xc18 - if(i2c_transfer_evt == NULL)return -1; - b10: 41 15 cp r20, r1 - b12: 51 05 cpc r21, r1 - b14: 09 f4 brne .+2 ; 0xb18 - b16: 83 c0 rjmp .+262 ; 0xc1e - b18: 7c 01 movw r14, r24 +00000bae <_exit>: + bae: f8 94 cli - inst->i2c_transfer_inst = i2c_transfer_inst; - b1a: dc 01 movw r26, r24 - b1c: 6d 93 st X+, r22 - b1e: 7c 93 st X, r23 - b20: 11 97 sbiw r26, 0x01 ; 1 - inst->i2c_transfer_evt = i2c_transfer_evt; - b22: 12 96 adiw r26, 0x02 ; 2 - b24: 4d 93 st X+, r20 - b26: 5c 93 st X, r21 - b28: 13 97 sbiw r26, 0x03 ; 3 - - int ret = 0; - - memset(&(inst->device_data),0x00,sizeof(si5351_data)); - b2a: fc 01 movw r30, r24 - b2c: 34 96 adiw r30, 0x04 ; 4 - b2e: 84 e5 ldi r24, 0x54 ; 84 - b30: df 01 movw r26, r30 - b32: 1d 92 st X+, r1 - b34: 8a 95 dec r24 - b36: e9 f7 brne .-6 ; 0xb32 - - /* Disable all outputs setting CLKx_DIS high */ - uint8_t temp = 0xff; - b38: 8f ef ldi r24, 0xFF ; 255 - b3a: 89 83 std Y+1, r24 ; 0x01 - writeRegister(inst,SI5351_REG_OUTPUT_ENABLE_CONTROL,&temp,1); - b3c: 01 e0 ldi r16, 0x01 ; 1 - b3e: 10 e0 ldi r17, 0x00 ; 0 - b40: 20 e0 ldi r18, 0x00 ; 0 - b42: 30 e0 ldi r19, 0x00 ; 0 - b44: ae 01 movw r20, r28 - b46: 4f 5f subi r20, 0xFF ; 255 - b48: 5f 4f sbci r21, 0xFF ; 255 - b4a: 63 e0 ldi r22, 0x03 ; 3 - b4c: c7 01 movw r24, r14 - b4e: 42 de rcall .-892 ; 0x7d4 - - /* Power down all output drivers */ - temp = 0x80; - b50: 80 e8 ldi r24, 0x80 ; 128 - b52: 89 83 std Y+1, r24 ; 0x01 - writeRegister(inst,SI5351_REG_CLK_0_CONTROL,&temp,1); - b54: 01 e0 ldi r16, 0x01 ; 1 - b56: 10 e0 ldi r17, 0x00 ; 0 - b58: 20 e0 ldi r18, 0x00 ; 0 - b5a: 30 e0 ldi r19, 0x00 ; 0 - b5c: ae 01 movw r20, r28 - b5e: 4f 5f subi r20, 0xFF ; 255 - b60: 5f 4f sbci r21, 0xFF ; 255 - b62: 60 e1 ldi r22, 0x10 ; 16 - b64: c7 01 movw r24, r14 - b66: 36 de rcall .-916 ; 0x7d4 - writeRegister(inst,SI5351_REG_CLK_1_CONTROL,&temp,1); - b68: 01 e0 ldi r16, 0x01 ; 1 - b6a: 10 e0 ldi r17, 0x00 ; 0 - b6c: 20 e0 ldi r18, 0x00 ; 0 - b6e: 30 e0 ldi r19, 0x00 ; 0 - b70: ae 01 movw r20, r28 - b72: 4f 5f subi r20, 0xFF ; 255 - b74: 5f 4f sbci r21, 0xFF ; 255 - b76: 61 e1 ldi r22, 0x11 ; 17 - b78: c7 01 movw r24, r14 - b7a: 2c de rcall .-936 ; 0x7d4 - writeRegister(inst,SI5351_REG_CLK_2_CONTROL,&temp,1); - b7c: 01 e0 ldi r16, 0x01 ; 1 - b7e: 10 e0 ldi r17, 0x00 ; 0 - b80: 20 e0 ldi r18, 0x00 ; 0 - b82: 30 e0 ldi r19, 0x00 ; 0 - b84: ae 01 movw r20, r28 - b86: 4f 5f subi r20, 0xFF ; 255 - b88: 5f 4f sbci r21, 0xFF ; 255 - b8a: 62 e1 ldi r22, 0x12 ; 18 - b8c: c7 01 movw r24, r14 - b8e: 22 de rcall .-956 ; 0x7d4 - writeRegister(inst,SI5351_REG_CLK_3_CONTROL,&temp,1); - b90: 01 e0 ldi r16, 0x01 ; 1 - b92: 10 e0 ldi r17, 0x00 ; 0 - b94: 20 e0 ldi r18, 0x00 ; 0 - b96: 30 e0 ldi r19, 0x00 ; 0 - b98: ae 01 movw r20, r28 - b9a: 4f 5f subi r20, 0xFF ; 255 - b9c: 5f 4f sbci r21, 0xFF ; 255 - b9e: 63 e1 ldi r22, 0x13 ; 19 - ba0: c7 01 movw r24, r14 - ba2: 18 de rcall .-976 ; 0x7d4 - writeRegister(inst,SI5351_REG_CLK_4_CONTROL,&temp,1); - ba4: 01 e0 ldi r16, 0x01 ; 1 - ba6: 10 e0 ldi r17, 0x00 ; 0 - ba8: 20 e0 ldi r18, 0x00 ; 0 - baa: 30 e0 ldi r19, 0x00 ; 0 - bac: ae 01 movw r20, r28 - bae: 4f 5f subi r20, 0xFF ; 255 - bb0: 5f 4f sbci r21, 0xFF ; 255 - bb2: 64 e1 ldi r22, 0x14 ; 20 - bb4: c7 01 movw r24, r14 - bb6: 0e de rcall .-996 ; 0x7d4 - writeRegister(inst,SI5351_REG_CLK_5_CONTROL,&temp,1); - bb8: 01 e0 ldi r16, 0x01 ; 1 - bba: 10 e0 ldi r17, 0x00 ; 0 - bbc: 20 e0 ldi r18, 0x00 ; 0 - bbe: 30 e0 ldi r19, 0x00 ; 0 - bc0: ae 01 movw r20, r28 - bc2: 4f 5f subi r20, 0xFF ; 255 - bc4: 5f 4f sbci r21, 0xFF ; 255 - bc6: 65 e1 ldi r22, 0x15 ; 21 - bc8: c7 01 movw r24, r14 - bca: 04 de rcall .-1016 ; 0x7d4 - writeRegister(inst,SI5351_REG_CLK_6_CONTROL,&temp,1); - bcc: 01 e0 ldi r16, 0x01 ; 1 - bce: 10 e0 ldi r17, 0x00 ; 0 - bd0: 20 e0 ldi r18, 0x00 ; 0 - bd2: 30 e0 ldi r19, 0x00 ; 0 - bd4: ae 01 movw r20, r28 - bd6: 4f 5f subi r20, 0xFF ; 255 - bd8: 5f 4f sbci r21, 0xFF ; 255 - bda: 66 e1 ldi r22, 0x16 ; 22 - bdc: c7 01 movw r24, r14 - bde: fa dd rcall .-1036 ; 0x7d4 - writeRegister(inst,SI5351_REG_CLK_7_CONTROL,&temp,1); - be0: 01 e0 ldi r16, 0x01 ; 1 - be2: 10 e0 ldi r17, 0x00 ; 0 - be4: 20 e0 ldi r18, 0x00 ; 0 - be6: 30 e0 ldi r19, 0x00 ; 0 - be8: ae 01 movw r20, r28 - bea: 4f 5f subi r20, 0xFF ; 255 - bec: 5f 4f sbci r21, 0xFF ; 255 - bee: 67 e1 ldi r22, 0x17 ; 23 - bf0: c7 01 movw r24, r14 - bf2: f0 dd rcall .-1056 ; 0x7d4 - - temp = SI5351_CRYSTAL_LOAD_10PF; - bf4: 80 ec ldi r24, 0xC0 ; 192 - bf6: 89 83 std Y+1, r24 ; 0x01 - - writeRegister(inst,SI5351_REG_CRYSTAL_LOAD_CAPACITANCE,&temp,1); - bf8: 01 e0 ldi r16, 0x01 ; 1 - bfa: 10 e0 ldi r17, 0x00 ; 0 - bfc: 20 e0 ldi r18, 0x00 ; 0 - bfe: 30 e0 ldi r19, 0x00 ; 0 - c00: ae 01 movw r20, r28 - c02: 4f 5f subi r20, 0xFF ; 255 - c04: 5f 4f sbci r21, 0xFF ; 255 - c06: 67 eb ldi r22, 0xB7 ; 183 - c08: c7 01 movw r24, r14 - c0a: e4 dd rcall .-1080 ; 0x7d4 - return ret; - c0c: 80 e0 ldi r24, 0x00 ; 0 - c0e: 90 e0 ldi r25, 0x00 ; 0 - c10: 08 c0 rjmp .+16 ; 0xc22 - return inst->device_data.deviceStatus.REVID; -} - -int cm_si5351_init(si5351_driver *inst, void *i2c_transfer_inst, setGet_I2C_Event_fpt i2c_transfer_evt){ - - if(inst == NULL)return -1; - c12: 8f ef ldi r24, 0xFF ; 255 - c14: 9f ef ldi r25, 0xFF ; 255 - c16: 05 c0 rjmp .+10 ; 0xc22 - if(i2c_transfer_inst == NULL)return -1; - c18: 8f ef ldi r24, 0xFF ; 255 - c1a: 9f ef ldi r25, 0xFF ; 255 - c1c: 02 c0 rjmp .+4 ; 0xc22 - if(i2c_transfer_evt == NULL)return -1; - c1e: 8f ef ldi r24, 0xFF ; 255 - c20: 9f ef ldi r25, 0xFF ; 255 - writeRegister(inst,SI5351_REG_CRYSTAL_LOAD_CAPACITANCE,&temp,1); - return ret; - - - -} - c22: 0f 90 pop r0 - c24: df 91 pop r29 - c26: cf 91 pop r28 - c28: 1f 91 pop r17 - c2a: 0f 91 pop r16 - c2c: ff 90 pop r15 - c2e: ef 90 pop r14 - c30: 08 95 ret - -00000c32 : - c32: 0f 93 push r16 - c34: 1f 93 push r17 - c36: cf 93 push r28 - c38: df 93 push r29 - c3a: 82 30 cpi r24, 0x02 ; 2 - c3c: 91 05 cpc r25, r1 - c3e: 10 f4 brcc .+4 ; 0xc44 - c40: 82 e0 ldi r24, 0x02 ; 2 - c42: 90 e0 ldi r25, 0x00 ; 0 - c44: e0 91 69 3f lds r30, 0x3F69 ; 0x803f69 <__flp> - c48: f0 91 6a 3f lds r31, 0x3F6A ; 0x803f6a <__flp+0x1> - c4c: 20 e0 ldi r18, 0x00 ; 0 - c4e: 30 e0 ldi r19, 0x00 ; 0 - c50: a0 e0 ldi r26, 0x00 ; 0 - c52: b0 e0 ldi r27, 0x00 ; 0 - c54: 30 97 sbiw r30, 0x00 ; 0 - c56: 19 f1 breq .+70 ; 0xc9e - c58: 40 81 ld r20, Z - c5a: 51 81 ldd r21, Z+1 ; 0x01 - c5c: 02 81 ldd r16, Z+2 ; 0x02 - c5e: 13 81 ldd r17, Z+3 ; 0x03 - c60: 48 17 cp r20, r24 - c62: 59 07 cpc r21, r25 - c64: c8 f0 brcs .+50 ; 0xc98 - c66: 84 17 cp r24, r20 - c68: 95 07 cpc r25, r21 - c6a: 69 f4 brne .+26 ; 0xc86 - c6c: 10 97 sbiw r26, 0x00 ; 0 - c6e: 31 f0 breq .+12 ; 0xc7c - c70: 12 96 adiw r26, 0x02 ; 2 - c72: 0c 93 st X, r16 - c74: 12 97 sbiw r26, 0x02 ; 2 - c76: 13 96 adiw r26, 0x03 ; 3 - c78: 1c 93 st X, r17 - c7a: 27 c0 rjmp .+78 ; 0xcca - c7c: 00 93 69 3f sts 0x3F69, r16 ; 0x803f69 <__flp> - c80: 10 93 6a 3f sts 0x3F6A, r17 ; 0x803f6a <__flp+0x1> - c84: 22 c0 rjmp .+68 ; 0xcca - c86: 21 15 cp r18, r1 - c88: 31 05 cpc r19, r1 - c8a: 19 f0 breq .+6 ; 0xc92 - c8c: 42 17 cp r20, r18 - c8e: 53 07 cpc r21, r19 - c90: 18 f4 brcc .+6 ; 0xc98 - c92: 9a 01 movw r18, r20 - c94: bd 01 movw r22, r26 - c96: ef 01 movw r28, r30 - c98: df 01 movw r26, r30 - c9a: f8 01 movw r30, r16 - c9c: db cf rjmp .-74 ; 0xc54 - c9e: 21 15 cp r18, r1 - ca0: 31 05 cpc r19, r1 - ca2: f9 f0 breq .+62 ; 0xce2 - ca4: 28 1b sub r18, r24 - ca6: 39 0b sbc r19, r25 - ca8: 24 30 cpi r18, 0x04 ; 4 - caa: 31 05 cpc r19, r1 - cac: 80 f4 brcc .+32 ; 0xcce - cae: 8a 81 ldd r24, Y+2 ; 0x02 - cb0: 9b 81 ldd r25, Y+3 ; 0x03 - cb2: 61 15 cp r22, r1 - cb4: 71 05 cpc r23, r1 - cb6: 21 f0 breq .+8 ; 0xcc0 - cb8: fb 01 movw r30, r22 - cba: 82 83 std Z+2, r24 ; 0x02 - cbc: 93 83 std Z+3, r25 ; 0x03 - cbe: 04 c0 rjmp .+8 ; 0xcc8 - cc0: 80 93 69 3f sts 0x3F69, r24 ; 0x803f69 <__flp> - cc4: 90 93 6a 3f sts 0x3F6A, r25 ; 0x803f6a <__flp+0x1> - cc8: fe 01 movw r30, r28 - cca: 32 96 adiw r30, 0x02 ; 2 - ccc: 44 c0 rjmp .+136 ; 0xd56 - cce: fe 01 movw r30, r28 - cd0: e2 0f add r30, r18 - cd2: f3 1f adc r31, r19 - cd4: 81 93 st Z+, r24 - cd6: 91 93 st Z+, r25 - cd8: 22 50 subi r18, 0x02 ; 2 - cda: 31 09 sbc r19, r1 - cdc: 28 83 st Y, r18 - cde: 39 83 std Y+1, r19 ; 0x01 - ce0: 3a c0 rjmp .+116 ; 0xd56 - ce2: 20 91 67 3f lds r18, 0x3F67 ; 0x803f67 <__brkval> - ce6: 30 91 68 3f lds r19, 0x3F68 ; 0x803f68 <__brkval+0x1> - cea: 23 2b or r18, r19 - cec: 41 f4 brne .+16 ; 0xcfe - cee: 20 91 02 3f lds r18, 0x3F02 ; 0x803f02 <__malloc_heap_start> - cf2: 30 91 03 3f lds r19, 0x3F03 ; 0x803f03 <__malloc_heap_start+0x1> - cf6: 20 93 67 3f sts 0x3F67, r18 ; 0x803f67 <__brkval> - cfa: 30 93 68 3f sts 0x3F68, r19 ; 0x803f68 <__brkval+0x1> - cfe: 20 91 00 3f lds r18, 0x3F00 ; 0x803f00 <__DATA_REGION_ORIGIN__> - d02: 30 91 01 3f lds r19, 0x3F01 ; 0x803f01 <__DATA_REGION_ORIGIN__+0x1> - d06: 21 15 cp r18, r1 - d08: 31 05 cpc r19, r1 - d0a: 41 f4 brne .+16 ; 0xd1c - d0c: 2d b7 in r18, 0x3d ; 61 - d0e: 3e b7 in r19, 0x3e ; 62 - d10: 40 91 04 3f lds r20, 0x3F04 ; 0x803f04 <__malloc_margin> - d14: 50 91 05 3f lds r21, 0x3F05 ; 0x803f05 <__malloc_margin+0x1> - d18: 24 1b sub r18, r20 - d1a: 35 0b sbc r19, r21 - d1c: e0 91 67 3f lds r30, 0x3F67 ; 0x803f67 <__brkval> - d20: f0 91 68 3f lds r31, 0x3F68 ; 0x803f68 <__brkval+0x1> - d24: e2 17 cp r30, r18 - d26: f3 07 cpc r31, r19 - d28: a0 f4 brcc .+40 ; 0xd52 - d2a: 2e 1b sub r18, r30 - d2c: 3f 0b sbc r19, r31 - d2e: 28 17 cp r18, r24 - d30: 39 07 cpc r19, r25 - d32: 78 f0 brcs .+30 ; 0xd52 - d34: ac 01 movw r20, r24 - d36: 4e 5f subi r20, 0xFE ; 254 - d38: 5f 4f sbci r21, 0xFF ; 255 - d3a: 24 17 cp r18, r20 - d3c: 35 07 cpc r19, r21 - d3e: 48 f0 brcs .+18 ; 0xd52 - d40: 4e 0f add r20, r30 - d42: 5f 1f adc r21, r31 - d44: 40 93 67 3f sts 0x3F67, r20 ; 0x803f67 <__brkval> - d48: 50 93 68 3f sts 0x3F68, r21 ; 0x803f68 <__brkval+0x1> - d4c: 81 93 st Z+, r24 - d4e: 91 93 st Z+, r25 - d50: 02 c0 rjmp .+4 ; 0xd56 - d52: e0 e0 ldi r30, 0x00 ; 0 - d54: f0 e0 ldi r31, 0x00 ; 0 - d56: cf 01 movw r24, r30 - d58: df 91 pop r29 - d5a: cf 91 pop r28 - d5c: 1f 91 pop r17 - d5e: 0f 91 pop r16 - d60: 08 95 ret - -00000d62 : - d62: cf 93 push r28 - d64: df 93 push r29 - d66: 00 97 sbiw r24, 0x00 ; 0 - d68: 09 f4 brne .+2 ; 0xd6c - d6a: 81 c0 rjmp .+258 ; 0xe6e - d6c: fc 01 movw r30, r24 - d6e: 32 97 sbiw r30, 0x02 ; 2 - d70: 12 82 std Z+2, r1 ; 0x02 - d72: 13 82 std Z+3, r1 ; 0x03 - d74: a0 91 69 3f lds r26, 0x3F69 ; 0x803f69 <__flp> - d78: b0 91 6a 3f lds r27, 0x3F6A ; 0x803f6a <__flp+0x1> - d7c: 10 97 sbiw r26, 0x00 ; 0 - d7e: 81 f4 brne .+32 ; 0xda0 - d80: 20 81 ld r18, Z - d82: 31 81 ldd r19, Z+1 ; 0x01 - d84: 82 0f add r24, r18 - d86: 93 1f adc r25, r19 - d88: 20 91 67 3f lds r18, 0x3F67 ; 0x803f67 <__brkval> - d8c: 30 91 68 3f lds r19, 0x3F68 ; 0x803f68 <__brkval+0x1> - d90: 28 17 cp r18, r24 - d92: 39 07 cpc r19, r25 - d94: 51 f5 brne .+84 ; 0xdea - d96: e0 93 67 3f sts 0x3F67, r30 ; 0x803f67 <__brkval> - d9a: f0 93 68 3f sts 0x3F68, r31 ; 0x803f68 <__brkval+0x1> - d9e: 67 c0 rjmp .+206 ; 0xe6e - da0: ed 01 movw r28, r26 - da2: 20 e0 ldi r18, 0x00 ; 0 - da4: 30 e0 ldi r19, 0x00 ; 0 - da6: ce 17 cp r28, r30 - da8: df 07 cpc r29, r31 - daa: 40 f4 brcc .+16 ; 0xdbc - dac: 4a 81 ldd r20, Y+2 ; 0x02 - dae: 5b 81 ldd r21, Y+3 ; 0x03 - db0: 9e 01 movw r18, r28 - db2: 41 15 cp r20, r1 - db4: 51 05 cpc r21, r1 - db6: f1 f0 breq .+60 ; 0xdf4 - db8: ea 01 movw r28, r20 - dba: f5 cf rjmp .-22 ; 0xda6 - dbc: c2 83 std Z+2, r28 ; 0x02 - dbe: d3 83 std Z+3, r29 ; 0x03 - dc0: 40 81 ld r20, Z - dc2: 51 81 ldd r21, Z+1 ; 0x01 - dc4: 84 0f add r24, r20 - dc6: 95 1f adc r25, r21 - dc8: c8 17 cp r28, r24 - dca: d9 07 cpc r29, r25 - dcc: 59 f4 brne .+22 ; 0xde4 - dce: 88 81 ld r24, Y - dd0: 99 81 ldd r25, Y+1 ; 0x01 - dd2: 84 0f add r24, r20 - dd4: 95 1f adc r25, r21 - dd6: 02 96 adiw r24, 0x02 ; 2 - dd8: 80 83 st Z, r24 - dda: 91 83 std Z+1, r25 ; 0x01 - ddc: 8a 81 ldd r24, Y+2 ; 0x02 - dde: 9b 81 ldd r25, Y+3 ; 0x03 - de0: 82 83 std Z+2, r24 ; 0x02 - de2: 93 83 std Z+3, r25 ; 0x03 - de4: 21 15 cp r18, r1 - de6: 31 05 cpc r19, r1 - de8: 29 f4 brne .+10 ; 0xdf4 - dea: e0 93 69 3f sts 0x3F69, r30 ; 0x803f69 <__flp> - dee: f0 93 6a 3f sts 0x3F6A, r31 ; 0x803f6a <__flp+0x1> - df2: 3d c0 rjmp .+122 ; 0xe6e - df4: e9 01 movw r28, r18 - df6: ea 83 std Y+2, r30 ; 0x02 - df8: fb 83 std Y+3, r31 ; 0x03 - dfa: 49 91 ld r20, Y+ - dfc: 59 91 ld r21, Y+ - dfe: c4 0f add r28, r20 - e00: d5 1f adc r29, r21 - e02: ec 17 cp r30, r28 - e04: fd 07 cpc r31, r29 - e06: 61 f4 brne .+24 ; 0xe20 - e08: 80 81 ld r24, Z - e0a: 91 81 ldd r25, Z+1 ; 0x01 - e0c: 84 0f add r24, r20 - e0e: 95 1f adc r25, r21 - e10: 02 96 adiw r24, 0x02 ; 2 - e12: e9 01 movw r28, r18 - e14: 88 83 st Y, r24 - e16: 99 83 std Y+1, r25 ; 0x01 - e18: 82 81 ldd r24, Z+2 ; 0x02 - e1a: 93 81 ldd r25, Z+3 ; 0x03 - e1c: 8a 83 std Y+2, r24 ; 0x02 - e1e: 9b 83 std Y+3, r25 ; 0x03 - e20: e0 e0 ldi r30, 0x00 ; 0 - e22: f0 e0 ldi r31, 0x00 ; 0 - e24: 12 96 adiw r26, 0x02 ; 2 - e26: 8d 91 ld r24, X+ - e28: 9c 91 ld r25, X - e2a: 13 97 sbiw r26, 0x03 ; 3 - e2c: 00 97 sbiw r24, 0x00 ; 0 - e2e: 19 f0 breq .+6 ; 0xe36 - e30: fd 01 movw r30, r26 - e32: dc 01 movw r26, r24 - e34: f7 cf rjmp .-18 ; 0xe24 - e36: 8d 91 ld r24, X+ - e38: 9c 91 ld r25, X - e3a: 11 97 sbiw r26, 0x01 ; 1 - e3c: 9d 01 movw r18, r26 - e3e: 2e 5f subi r18, 0xFE ; 254 - e40: 3f 4f sbci r19, 0xFF ; 255 - e42: 82 0f add r24, r18 - e44: 93 1f adc r25, r19 - e46: 20 91 67 3f lds r18, 0x3F67 ; 0x803f67 <__brkval> - e4a: 30 91 68 3f lds r19, 0x3F68 ; 0x803f68 <__brkval+0x1> - e4e: 28 17 cp r18, r24 - e50: 39 07 cpc r19, r25 - e52: 69 f4 brne .+26 ; 0xe6e - e54: 30 97 sbiw r30, 0x00 ; 0 - e56: 29 f4 brne .+10 ; 0xe62 - e58: 10 92 69 3f sts 0x3F69, r1 ; 0x803f69 <__flp> - e5c: 10 92 6a 3f sts 0x3F6A, r1 ; 0x803f6a <__flp+0x1> - e60: 02 c0 rjmp .+4 ; 0xe66 - e62: 12 82 std Z+2, r1 ; 0x02 - e64: 13 82 std Z+3, r1 ; 0x03 - e66: a0 93 67 3f sts 0x3F67, r26 ; 0x803f67 <__brkval> - e6a: b0 93 68 3f sts 0x3F68, r27 ; 0x803f68 <__brkval+0x1> - e6e: df 91 pop r29 - e70: cf 91 pop r28 - e72: 08 95 ret - -00000e74 : - e74: fb 01 movw r30, r22 - e76: dc 01 movw r26, r24 - e78: 02 c0 rjmp .+4 ; 0xe7e - e7a: 01 90 ld r0, Z+ - e7c: 0d 92 st X+, r0 - e7e: 41 50 subi r20, 0x01 ; 1 - e80: 50 40 sbci r21, 0x00 ; 0 - e82: d8 f7 brcc .-10 ; 0xe7a - e84: 08 95 ret - -00000e86 : - e86: 03 d0 rcall .+6 ; 0xe8e - e88: 80 81 ld r24, Z - e8a: 99 27 eor r25, r25 - e8c: 08 95 ret - -00000e8e : - e8e: fc 01 movw r30, r24 - e90: e0 50 subi r30, 0x00 ; 0 - e92: fc 4e sbci r31, 0xEC ; 236 - e94: 08 95 ret - -00000e96 : - e96: 26 2f mov r18, r22 - -00000e98 : - e98: af 93 push r26 - e9a: bf 93 push r27 - e9c: e0 e0 ldi r30, 0x00 ; 0 - e9e: f0 e1 ldi r31, 0x10 ; 16 - ea0: 32 81 ldd r19, Z+2 ; 0x02 - ea2: 31 fd sbrc r19, 1 - ea4: fd cf rjmp .-6 ; 0xea0 - ea6: dc 01 movw r26, r24 - ea8: a0 50 subi r26, 0x00 ; 0 - eaa: bc 4e sbci r27, 0xEC ; 236 - eac: 2c 93 st X, r18 - eae: 2d e9 ldi r18, 0x9D ; 157 - eb0: 24 bf out 0x34, r18 ; 52 - eb2: 23 e0 ldi r18, 0x03 ; 3 - eb4: 20 83 st Z, r18 - eb6: 01 96 adiw r24, 0x01 ; 1 - eb8: bf 91 pop r27 - eba: af 91 pop r26 - ebc: 08 95 ret - -00000ebe <_exit>: - ebe: f8 94 cli - -00000ec0 <__stop_program>: - ec0: ff cf rjmp .-2 ; 0xec0 <__stop_program> +00000bb0 <__stop_program>: + bb0: ff cf rjmp .-2 ; 0xbb0 <__stop_program> diff --git a/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.map b/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.map index 4d67400..1d945ee 100644 --- a/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.map +++ b/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.map @@ -43,7 +43,7 @@ c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/.. c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega3/short-calls\libgcc.a(_exit.o) C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls/crtattiny402.o (exit) c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega3/short-calls\libgcc.a(_copy_data.o) - cqm6xx_app.o (__do_copy_data) + main.o (__do_copy_data) c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega3/short-calls\libgcc.a(_clear_bss.o) avr_uart_driver/avr_uart.o (__do_clear_bss) c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(malloc.o) @@ -58,8 +58,7 @@ C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/ Allocating common symbols Common symbol size file -temp_msg 0x19 cqm6xx_app.o -storno_xtal_app 0x6 main.o +storno_xtal_app 0x1d main.o __brkval 0x2 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(malloc.o) __flp 0x2 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(malloc.o) @@ -110,8 +109,18 @@ Discarded input sections .bss 0x00000000 0x0 si5351_driver/si5351_driver.o .text.readRegister 0x00000000 0x80 si5351_driver/si5351_driver.o + .text.cm_setOutputMultiSynthRaw + 0x00000000 0xcc si5351_driver/si5351_driver.o .text.cm_setOutputMultiSynth 0x00000000 0x116 si5351_driver/si5351_driver.o + .text.cm_setCLKControl + 0x00000000 0x5c si5351_driver/si5351_driver.o + .text.cm_setInputSource + 0x00000000 0x3e si5351_driver/si5351_driver.o + .text.cm_resetPLLs + 0x00000000 0x48 si5351_driver/si5351_driver.o + .text.cm_setPllParamRaw + 0x00000000 0xbc si5351_driver/si5351_driver.o .text.cm_setPLLParameters 0x00000000 0x2ce si5351_driver/si5351_driver.o .text.cm_si5351_getRevisionNumber @@ -422,7 +431,7 @@ END GROUP .rela.plt *(.rela.plt) -.text 0x00000000 0xec2 +.text 0x00000000 0xbb2 *(.vectors) .vectors 0x00000000 0x34 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls/crtattiny402.o 0x00000000 __vector_default @@ -557,69 +566,52 @@ END GROUP 0x0000052e cm_MsgCompleteEvt_Register .text.isStructValid 0x0000054a 0x1a cqm6xx_app.o - .text.cqm_setPLLParam - 0x00000564 0x96 cqm6xx_app.o .text.cqm6xx_app_loadPLLParam - 0x000005fa 0x52 cqm6xx_app.o + 0x00000564 0x32 cqm6xx_app.o .text.cqm6xx_app_updateOsc - 0x0000064c 0x76 cqm6xx_app.o + 0x00000596 0x76 cqm6xx_app.o .text.cqm6xx_app_statemachine - 0x000006c2 0x5a cqm6xx_app.o - 0x000006c2 cqm6xx_app_statemachine + 0x0000060c 0x5a cqm6xx_app.o + 0x0000060c cqm6xx_app_statemachine .text.programPLL_Parameters - 0x0000071c 0x28 cqm6xx_app.o - 0x0000071c programPLL_Parameters + 0x00000666 0x2e cqm6xx_app.o + 0x00000666 programPLL_Parameters .text.uart_rx_event - 0x00000744 0xe cqm6xx_app.o - 0x00000744 uart_rx_event + 0x00000694 0x18 cqm6xx_app.o + 0x00000694 uart_rx_event .text.cqm6xx_app_init - 0x00000752 0x2c cqm6xx_app.o - 0x00000752 cqm6xx_app_init - .text.main 0x0000077e 0x56 main.o - 0x0000077e main + 0x000006ac 0x2c cqm6xx_app.o + 0x000006ac cqm6xx_app_init + .text.main 0x000006d8 0x56 main.o + 0x000006d8 main .text.writeRegister - 0x000007d4 0x72 si5351_driver/si5351_driver.o - .text.cm_setOutputMultiSynthRaw - 0x00000846 0xcc si5351_driver/si5351_driver.o - 0x00000846 cm_setOutputMultiSynthRaw + 0x0000072e 0x72 si5351_driver/si5351_driver.o .text.cm_setOutputEnable - 0x00000912 0x40 si5351_driver/si5351_driver.o - 0x00000912 cm_setOutputEnable - .text.cm_setCLKControl - 0x00000952 0x5c si5351_driver/si5351_driver.o - 0x00000952 cm_setCLKControl - .text.cm_setInputSource - 0x000009ae 0x3e si5351_driver/si5351_driver.o - 0x000009ae cm_setInputSource - .text.cm_resetPLLs - 0x000009ec 0x48 si5351_driver/si5351_driver.o - 0x000009ec cm_resetPLLs - .text.cm_setPllParamRaw - 0x00000a34 0xbc si5351_driver/si5351_driver.o - 0x00000a34 cm_setPllParamRaw + 0x000007a0 0x40 si5351_driver/si5351_driver.o + 0x000007a0 cm_setOutputEnable .text.cm_si5351_init - 0x00000af0 0x142 si5351_driver/si5351_driver.o - 0x00000af0 cm_si5351_init + 0x000007e0 0x142 si5351_driver/si5351_driver.o + 0x000007e0 cm_si5351_init .text.avr-libc - 0x00000c32 0x242 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(malloc.o) - 0x00000c32 malloc - 0x00000d62 free + 0x00000922 0x242 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(malloc.o) + 0x00000922 malloc + 0x00000a52 free .text.avr-libc - 0x00000e74 0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(memcpy.o) - 0x00000e74 memcpy + 0x00000b64 0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(memcpy.o) + 0x00000b64 memcpy .text.avr-libc - 0x00000e86 0x10 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) - 0x00000e86 eeprom_read_byte - 0x00000e8e eeprom_mapen + 0x00000b76 0x10 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) + 0x00000b76 eeprom_read_byte + 0x00000b7e eeprom_mapen .text.avr-libc - 0x00000e96 0x28 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) - 0x00000e96 eeprom_write_byte - 0x00000e98 eeprom_write_r18 - 0x00000ebe . = ALIGN (0x2) + 0x00000b86 0x28 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) + 0x00000b86 eeprom_write_byte + 0x00000b88 eeprom_write_r18 + 0x00000bae . = ALIGN (0x2) *(.fini9) - .fini9 0x00000ebe 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega3/short-calls\libgcc.a(_exit.o) - 0x00000ebe _exit - 0x00000ebe exit + .fini9 0x00000bae 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega3/short-calls\libgcc.a(_exit.o) + 0x00000bae _exit + 0x00000bae exit *(.fini9) *(.fini8) *(.fini8) @@ -638,18 +630,18 @@ END GROUP *(.fini1) *(.fini1) *(.fini0) - .fini0 0x00000ebe 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega3/short-calls\libgcc.a(_exit.o) + .fini0 0x00000bae 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega3/short-calls\libgcc.a(_exit.o) *(.fini0) - 0x00000ec2 _etext = . + 0x00000bb2 _etext = . -.rodata 0x00008ec2 0x5 load address 0x00000ec2 +.rodata 0x00008bb2 0x5 load address 0x00000bb2 *(.rodata) *(.rodata*) .rodata.startCode - 0x00008ec2 0x5 cm_msg/cm_msg.o + 0x00008bb2 0x5 cm_msg/cm_msg.o *(.gnu.linkonce.r*) -.data 0x00803f00 0x8 load address 0x00000ec7 +.data 0x00803f00 0x6 load address 0x00000bb7 0x00803f00 PROVIDE (__data_start, .) *(.data) .data 0x00803f00 0x6 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(malloc.o) @@ -657,51 +649,49 @@ END GROUP 0x00803f02 __malloc_heap_start 0x00803f04 __malloc_margin *(.data*) - .data.msg_ptr 0x00803f06 0x2 cqm6xx_app.o - 0x00803f06 msg_ptr *(.gnu.linkonce.d*) - 0x00803f08 . = ALIGN (0x2) - 0x00803f08 _edata = . - 0x00803f08 PROVIDE (__data_end, .) + 0x00803f06 . = ALIGN (0x2) + 0x00803f06 _edata = . + 0x00803f06 PROVIDE (__data_end, .) -.bss 0x00803f08 0x63 - 0x00803f08 PROVIDE (__bss_start, .) +.bss 0x00803f06 0x62 + 0x00803f06 PROVIDE (__bss_start, .) *(.bss) *(.bss*) .bss.uart_rx_evt_fpt - 0x00803f08 0x2 avr_uart_driver/avr_uart.o - 0x00803f08 uart_rx_evt_fpt - .bss.msg.1844 0x00803f0a 0x37 cm_msg/cm_msg.o + 0x00803f06 0x2 avr_uart_driver/avr_uart.o + 0x00803f06 uart_rx_evt_fpt + .bss.msg.1844 0x00803f08 0x37 cm_msg/cm_msg.o .bss.data_bytes_idx.1845 - 0x00803f41 0x1 cm_msg/cm_msg.o + 0x00803f3f 0x1 cm_msg/cm_msg.o .bss.state.1843 - 0x00803f42 0x1 cm_msg/cm_msg.o + 0x00803f40 0x1 cm_msg/cm_msg.o .bss.state.1832 - 0x00803f43 0x1 cm_msg/cm_msg.o + 0x00803f41 0x1 cm_msg/cm_msg.o .bss.s_msg_cmplete_evt_inst - 0x00803f44 0x2 cm_msg/cm_msg.o - 0x00803f44 s_msg_cmplete_evt_inst + 0x00803f42 0x2 cm_msg/cm_msg.o + 0x00803f42 s_msg_cmplete_evt_inst .bss.s_msg_cmplete_evt_fpt - 0x00803f46 0x2 cm_msg/cm_msg.o - 0x00803f46 s_msg_cmplete_evt_fpt + 0x00803f44 0x2 cm_msg/cm_msg.o + 0x00803f44 s_msg_cmplete_evt_fpt + .bss.size 0x00803f46 0x1 cqm6xx_app.o + 0x00803f46 size *(COMMON) - COMMON 0x00803f48 0x19 cqm6xx_app.o - 0x00803f48 temp_msg - COMMON 0x00803f61 0x6 main.o - 0x00803f61 storno_xtal_app - COMMON 0x00803f67 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(malloc.o) - 0x00803f67 __brkval - 0x00803f69 __flp - 0x00803f6b PROVIDE (__bss_end, .) - 0x00000ec7 __data_load_start = LOADADDR (.data) - 0x00000ecf __data_load_end = (__data_load_start + SIZEOF (.data)) + COMMON 0x00803f47 0x1d main.o + 0x00803f47 storno_xtal_app + COMMON 0x00803f64 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega3/short-calls\libc.a(malloc.o) + 0x00803f64 __brkval + 0x00803f66 __flp + 0x00803f68 PROVIDE (__bss_end, .) + 0x00000bb7 __data_load_start = LOADADDR (.data) + 0x00000bbd __data_load_end = (__data_load_start + SIZEOF (.data)) -.noinit 0x00803f6b 0x0 +.noinit 0x00803f68 0x0 [!provide] PROVIDE (__noinit_start, .) *(.noinit*) [!provide] PROVIDE (__noinit_end, .) - 0x00803f6b _end = . - 0x00803f6b PROVIDE (__heap_start, .) + 0x00803f68 _end = . + 0x00803f68 PROVIDE (__heap_start, .) .eeprom 0x00810000 0x0 *(.eeprom*) @@ -773,7 +763,7 @@ END GROUP .debug_sfnames *(.debug_sfnames) -.debug_aranges 0x00000000 0x260 +.debug_aranges 0x00000000 0x258 *(.debug_aranges) .debug_aranges 0x00000000 0x28 avr_eeprom_driver/avr_eeprom_driver.o @@ -786,20 +776,20 @@ END GROUP .debug_aranges 0x00000100 0x30 cm_msg/cm_msg.o .debug_aranges - 0x00000130 0x58 cqm6xx_app.o + 0x00000130 0x50 cqm6xx_app.o .debug_aranges - 0x00000188 0x20 main.o + 0x00000180 0x20 main.o .debug_aranges - 0x000001a8 0x78 si5351_driver/si5351_driver.o + 0x000001a0 0x78 si5351_driver/si5351_driver.o .debug_aranges - 0x00000220 0x20 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) + 0x00000218 0x20 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) .debug_aranges - 0x00000240 0x20 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) + 0x00000238 0x20 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) .debug_pubnames *(.debug_pubnames) -.debug_info 0x00000000 0x539c +.debug_info 0x00000000 0x5174 *(.debug_info .gnu.linkonce.wi.*) .debug_info 0x00000000 0x11d6 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls/crtattiny402.o .debug_info 0x000011d6 0x16b avr_eeprom_driver/avr_eeprom_driver.o @@ -807,11 +797,11 @@ END GROUP .debug_info 0x00001661 0x6da avr_i2c_driver/avr_i2c.o .debug_info 0x00001d3b 0x4fc avr_uart_driver/avr_uart.o .debug_info 0x00002237 0x2b4 cm_msg/cm_msg.o - .debug_info 0x000024eb 0x989 cqm6xx_app.o - .debug_info 0x00002e74 0xd18 main.o - .debug_info 0x00003b8c 0x16b6 si5351_driver/si5351_driver.o - .debug_info 0x00005242 0xad C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) - .debug_info 0x000052ef 0xad C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) + .debug_info 0x000024eb 0x767 cqm6xx_app.o + .debug_info 0x00002c52 0xd12 main.o + .debug_info 0x00003964 0x16b6 si5351_driver/si5351_driver.o + .debug_info 0x0000501a 0xad C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) + .debug_info 0x000050c7 0xad C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) .debug_abbrev 0x00000000 0x1d9f *(.debug_abbrev) @@ -827,7 +817,7 @@ END GROUP .debug_abbrev 0x00001d77 0x14 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) .debug_abbrev 0x00001d8b 0x14 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) -.debug_line 0x00000000 0x18a4 +.debug_line 0x00000000 0x184c *(.debug_line .debug_line.* .debug_line_end) .debug_line 0x00000000 0x136 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls/crtattiny402.o .debug_line 0x00000136 0x186 avr_eeprom_driver/avr_eeprom_driver.o @@ -835,53 +825,53 @@ END GROUP .debug_line 0x00000452 0x3ff avr_i2c_driver/avr_i2c.o .debug_line 0x00000851 0x21b avr_uart_driver/avr_uart.o .debug_line 0x00000a6c 0x21a cm_msg/cm_msg.o - .debug_line 0x00000c86 0x3f6 cqm6xx_app.o - .debug_line 0x0000107c 0x18f main.o - .debug_line 0x0000120b 0x559 si5351_driver/si5351_driver.o - .debug_line 0x00001764 0x7c C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) - .debug_line 0x000017e0 0xc4 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) + .debug_line 0x00000c86 0x39e cqm6xx_app.o + .debug_line 0x00001024 0x18f main.o + .debug_line 0x000011b3 0x559 si5351_driver/si5351_driver.o + .debug_line 0x0000170c 0x7c C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eerd_byte.o) + .debug_line 0x00001788 0xc4 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls\libattiny402.a(eewr_byte.o) -.debug_frame 0x00000000 0x694 +.debug_frame 0x00000000 0x64c *(.debug_frame) .debug_frame 0x00000000 0x7c avr_eeprom_driver/avr_eeprom_driver.o .debug_frame 0x0000007c 0x44 avr_gpio_driver/avr_gpio.o .debug_frame 0x000000c0 0x118 avr_i2c_driver/avr_i2c.o .debug_frame 0x000001d8 0xbc avr_uart_driver/avr_uart.o .debug_frame 0x00000294 0x44 cm_msg/cm_msg.o - .debug_frame 0x000002d8 0xfc cqm6xx_app.o - .debug_frame 0x000003d4 0x34 main.o - .debug_frame 0x00000408 0x28c si5351_driver/si5351_driver.o + .debug_frame 0x000002d8 0xb4 cqm6xx_app.o + .debug_frame 0x0000038c 0x34 main.o + .debug_frame 0x000003c0 0x28c si5351_driver/si5351_driver.o -.debug_str 0x00000000 0x227c +.debug_str 0x00000000 0x22b5 *(.debug_str) .debug_str 0x00000000 0x7a9 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny402/avrxmega3/short-calls/crtattiny402.o - .debug_str 0x000007a9 0x1d9 avr_eeprom_driver/avr_eeprom_driver.o - 0x21f (size before relaxing) - .debug_str 0x00000982 0x16e avr_gpio_driver/avr_gpio.o - 0x319 (size before relaxing) - .debug_str 0x00000af0 0x2ab avr_i2c_driver/avr_i2c.o + .debug_str 0x000007a9 0x1d5 avr_eeprom_driver/avr_eeprom_driver.o + 0x21b (size before relaxing) + .debug_str 0x0000097e 0x16e avr_gpio_driver/avr_gpio.o + 0x315 (size before relaxing) + .debug_str 0x00000aec 0x310 avr_i2c_driver/avr_i2c.o 0x506 (size before relaxing) - .debug_str 0x00000d9b 0x283 avr_uart_driver/avr_uart.o - 0x4f8 (size before relaxing) - .debug_str 0x0000101e 0x23a cm_msg/cm_msg.o - 0x3fe (size before relaxing) - .debug_str 0x00001258 0x3c1 cqm6xx_app.o - 0x624 (size before relaxing) - .debug_str 0x00001619 0x908 main.o - 0xc65 (size before relaxing) - .debug_str 0x00001f21 0x35b si5351_driver/si5351_driver.o + .debug_str 0x00000dfc 0x283 avr_uart_driver/avr_uart.o + 0x4f4 (size before relaxing) + .debug_str 0x0000107f 0x23a cm_msg/cm_msg.o + 0x3fa (size before relaxing) + .debug_str 0x000012b9 0x2b7 cqm6xx_app.o + 0x514 (size before relaxing) + .debug_str 0x00001570 0x908 main.o + 0xc62 (size before relaxing) + .debug_str 0x00001e78 0x43d si5351_driver/si5351_driver.o 0xfbf (size before relaxing) -.debug_loc 0x00000000 0x23ef +.debug_loc 0x00000000 0x223e *(.debug_loc) .debug_loc 0x00000000 0x24e avr_eeprom_driver/avr_eeprom_driver.o .debug_loc 0x0000024e 0xae avr_gpio_driver/avr_gpio.o .debug_loc 0x000002fc 0x73d avr_i2c_driver/avr_i2c.o .debug_loc 0x00000a39 0x13b avr_uart_driver/avr_uart.o .debug_loc 0x00000b74 0x179 cm_msg/cm_msg.o - .debug_loc 0x00000ced 0x5f7 cqm6xx_app.o - .debug_loc 0x000012e4 0x48 main.o - .debug_loc 0x0000132c 0x10c3 si5351_driver/si5351_driver.o + .debug_loc 0x00000ced 0x446 cqm6xx_app.o + .debug_loc 0x00001133 0x48 main.o + .debug_loc 0x0000117b 0x10c3 si5351_driver/si5351_driver.o .debug_macinfo *(.debug_macinfo) @@ -901,16 +891,16 @@ END GROUP .debug_pubtypes *(.debug_pubtypes) -.debug_ranges 0x00000000 0x1a0 +.debug_ranges 0x00000000 0x198 *(.debug_ranges) .debug_ranges 0x00000000 0x18 avr_eeprom_driver/avr_eeprom_driver.o .debug_ranges 0x00000018 0x20 avr_gpio_driver/avr_gpio.o .debug_ranges 0x00000038 0x58 avr_i2c_driver/avr_i2c.o .debug_ranges 0x00000090 0x30 avr_uart_driver/avr_uart.o .debug_ranges 0x000000c0 0x20 cm_msg/cm_msg.o - .debug_ranges 0x000000e0 0x48 cqm6xx_app.o - .debug_ranges 0x00000128 0x10 main.o - .debug_ranges 0x00000138 0x68 si5351_driver/si5351_driver.o + .debug_ranges 0x000000e0 0x40 cqm6xx_app.o + .debug_ranges 0x00000120 0x10 main.o + .debug_ranges 0x00000130 0x68 si5351_driver/si5351_driver.o .debug_macro *(.debug_macro) diff --git a/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.srec b/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.srec index 0b57597..75ddb78 100644 --- a/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.srec +++ b/storno_cqp6xx_digital_xtal/Debug/storno_cqp6xx_digital_xtal.srec @@ -3,16 +3,16 @@ S113000019C033C032C031C030C02FC02EC02DC083 S11300102CC02BC02AC029C028C027C026C025C098 S113002024C023C022C021C020C01FC082C11DC063 S11300301CC01BC011241FBECFEFCDBFDFE3DEBF4A -S11300401FE3A0E0BFE3E7ECFEE002C005900D92E1 -S1130050A830B107D9F72FE3A8E0BFE301C01D9290 -S1130060AB36B207E1F78BD32AC7CACFEF92FF9220 +S11300401FE3A0E0BFE3E7EBFBE002C005900D92E5 +S1130050A630B107D9F72FE3A6E0BFE301C01D9294 +S1130060A836B207E1F738D3A2C5CACFEF92FF9200 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a/storno_cqp6xx_digital_xtal/avr_eeprom_driver +++ b/storno_cqp6xx_digital_xtal/avr_eeprom_driver @@ -1 +1 @@ -Subproject commit 5786c777ac4afc7fbbdb18f5a1ece4d06b79ac87 +Subproject commit 64f9707885133148e18cb8879e3ecce2ea503e6c diff --git a/storno_cqp6xx_digital_xtal/cqm6xx_app.c b/storno_cqp6xx_digital_xtal/cqm6xx_app.c index 304db8a..b6fb2e5 100644 --- a/storno_cqp6xx_digital_xtal/cqm6xx_app.c +++ b/storno_cqp6xx_digital_xtal/cqm6xx_app.c @@ -5,6 +5,7 @@ * Author: Christian Lind Vie Madsen - OZ1CM */ #include "cqm6xx_app.h" +#include "string.h" #include "si5351_driver/include/si5351_driver.h" #include "avr_gpio_driver/avr_gpio.h" #include "avr_uart_driver/avr_uart.h" @@ -12,12 +13,12 @@ #include "avr_eeprom_driver/avr_eeprom_driver.h" #include "cm_msg/cm_msg.h" #include - +# define EEPROM_OFFSET 0x1400 #define PLLA_SETTINGS_EEPROM_ADDR 0x00 // addr 0 #define PLLB_SETTINGS_EEPROM_ADDR 0x20 // addr 32 (64 bytes total memory) - storno_pll_param_msg temp_msg; - uint8_t *msg_ptr = (void*)&temp_msg; + //storno_pll_param_msg temp_msg; + //uint8_t *msg_ptr = (void*)&temp_msg; static uint8_t isStructValid(storno_xtal_app_t *inst){ @@ -63,29 +64,33 @@ static void cqm6xx_app_updateOsc(storno_xtal_app_t *inst){ static void cqm_setPLLParam(storno_xtal_app_t *inst, si5351_PLLs pll_num, si5351_Outputs output){ - cm_setPllParamRaw(inst->si5351_dev,pll_num, inst->pll_param_ptr->MSNx_P1, inst->pll_param_ptr->MSNx_P2, inst->pll_param_ptr->MSNx_P3); + cm_setPllParamRaw(inst->si5351_dev,pll_num, inst->pll_param_data.MSNx_P1, inst->pll_param_data.MSNx_P2, inst->pll_param_data.MSNx_P3); _delay_ms(1); - cm_setOutputMultiSynthRaw(inst->si5351_dev,output, inst->pll_param_ptr->MSx_P1, inst->pll_param_ptr->MSx_P2, inst->pll_param_ptr->MSx_P3); + cm_setOutputMultiSynthRaw(inst->si5351_dev,output, inst->pll_param_data.MSx_P1, inst->pll_param_data.MSx_P2, inst->pll_param_data.MSx_P3); _delay_ms(1); cm_setCLKControl(inst->si5351_dev,output,SI5351_CLK_POWER_UP); } - +uint8_t size = 0; static void cqm6xx_app_loadPLLParam(storno_xtal_app_t *inst){ - cm_setInputSource(inst->si5351_dev, SI5351_CLK_SOURCE_XTAL); + size = sizeof(storno_pll_param_msg); + + // Read settings for PLLA first + cm_EEPROM_read((uint8_t*)PLLA_SETTINGS_EEPROM_ADDR,(uint8_t *)&inst->pll_param_data,size); + + //cm_setInputSource(inst->si5351_dev, SI5351_CLK_SOURCE_XTAL); _delay_ms(1); - inst->pll_param_ptr = &temp_msg; - cm_EEPROM_read(PLLA_SETTINGS_EEPROM_ADDR,msg_ptr,sizeof(storno_pll_param_msg)); - - cqm_setPLLParam(inst, SI5351_PLL_A, SI5351_OUTPUT_0); - cm_setCLKControl(inst->si5351_dev,SI5351_OUTPUT_0,SI5351_CLK_POWER_UP); - _delay_ms(1); - //cm_EEPROM_read(PLLB_SETTINGS_EEPROM_ADDR,msg_ptr,sizeof(storno_pll_param_msg)); + //cqm_setPLLParam(inst, SI5351_PLL_A, SI5351_OUTPUT_0); + //cm_setCLKControl(inst->si5351_dev,SI5351_OUTPUT_0,SI5351_CLK_POWER_UP); + //_delay_ms(1); + + + cm_EEPROM_read((uint8_t*)PLLB_SETTINGS_EEPROM_ADDR,(uint8_t *)&inst->pll_param_data,sizeof(storno_pll_param_msg)); //inst->pll_param_ptr = &temp_msg; //cqm_setPLLParam(inst, SI5351_PLL_B, SI5351_OUTPUT_1); //cm_setCLKControl(inst->si5351_dev,SI5351_OUTPUT_1,SI5351_CLK_POWER_UP); @@ -153,14 +158,14 @@ void cqm6xx_app_statemachine(storno_xtal_app_t *inst){ void programPLL_Parameters(storno_xtal_app_t *inst){ //Burn settings into eeprom here: - switch(inst->pll_param_ptr->PLL_Ident){ + switch(inst->pll_param_data.PLL_Ident){ case MSG_PLLA_PARAM: - cm_EEPROM_write(PLLA_SETTINGS_EEPROM_ADDR,(uint8_t*)(inst->pll_param_ptr), sizeof(storno_pll_param_msg)); + cm_EEPROM_write((uint8_t*)PLLB_SETTINGS_EEPROM_ADDR,(uint8_t*)&(inst->pll_param_data), sizeof(storno_pll_param_msg)); break; case MSG_PLLB_PARAM: - cm_EEPROM_write(PLLB_SETTINGS_EEPROM_ADDR,(uint8_t*)(inst->pll_param_ptr), sizeof(storno_pll_param_msg)); + cm_EEPROM_write((uint8_t*)PLLB_SETTINGS_EEPROM_ADDR,(uint8_t*)&(inst->pll_param_data), sizeof(storno_pll_param_msg)); break; } @@ -174,8 +179,9 @@ void programPLL_Parameters(storno_xtal_app_t *inst){ int uart_rx_event(storno_xtal_app_t *inst, void *rxData){ - inst->pll_param_ptr = rxData; + memcpy(&inst->pll_param_data,rxData,sizeof(storno_pll_param_msg)); + programPLL_Parameters(inst); return 0; diff --git a/storno_cqp6xx_digital_xtal/cqm6xx_app.h b/storno_cqp6xx_digital_xtal/cqm6xx_app.h index 6d057bd..eca660e 100644 --- a/storno_cqp6xx_digital_xtal/cqm6xx_app.h +++ b/storno_cqp6xx_digital_xtal/cqm6xx_app.h @@ -50,7 +50,6 @@ typedef struct { storno_app_states state_next; void *si5351_dev; - storno_pll_param_msg *pll_param_ptr; storno_pll_param_msg pll_param_data; diff --git a/storno_cqp6xx_digital_xtal/main.c b/storno_cqp6xx_digital_xtal/main.c index b3ba210..cc09dcc 100644 --- a/storno_cqp6xx_digital_xtal/main.c +++ b/storno_cqp6xx_digital_xtal/main.c @@ -14,10 +14,6 @@ #include "avr_eeprom_driver/avr_eeprom_driver.h" storno_xtal_app_t storno_xtal_app; - - uint8_t data_set[25] = {0x55,56}; - //cm_EEPROM_write(0x00,data_set,1); - uint8_t data[25] = {0}; int main(void) {